Zynq_Flasher

T

Jeremy Shen 9a7a625c46 feat: boot mode parsing, FSBL-first flow, UI reorder

1. Boot mode parsing:
   - BootInfo.boot_mode field added
   - Matches 'Boot mode is JTAG', 'Boot Mode: QSPI', etc.
   - Fixed false version match: 'Boot mode is' no longer
     captures 'mode' as a version string

2. UART window cleanup:
   - Parsed boot info (mode/IP/ver) now only goes to main log
   - Raw serial lines still appear in UART window

3. Step 3 FSBL enforcement:
   - BIT step: after fpga -file, CPU is immediately halted (stop)
     to prevent Flash code from enabling MMU
   - ELF step: always dow FSBL → con → stop → dow bootloader

4. UI reorder:
   - FSBL ELF selector moved BEFORE Bootloader BIT
   - New layout: FSBL → BIT → ELF → Bootloader BIN → Flash → FW BIN
   - Fixed grid overlap (FSBL and Flash were both at row 6)

2026-06-10 16:20:12 +08:00

config

✨ feat: Xilinx Kit directory selector + multi-version scan

2026-06-10 14:27:47 +08:00

src

feat: boot mode parsing, FSBL-first flow, UI reorder

2026-06-10 16:20:12 +08:00

.gitignore

feat: initial Zynq XC7Z100 Flasher GUI project

2026-06-08 11:33:50 +08:00

.gitmessage

feat: initial Zynq XC7Z100 Flasher GUI project