Compare commits
4
Commits
6f02f47407
..
master
| Author | SHA1 | Date | |
|---|---|---|---|
 yuysh
|
72b55f165d | ||
 Jeremy Shen
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6991600083 | ||
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yuysh
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a4abf50594 | ||
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yuysh
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893467bdfe |
Vendored
+3
@@ -0,0 +1,3 @@
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{
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"iis.configDir": ""
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}
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@@ -12,3 +12,151 @@ timestamp=[2026-05-28 18:36:02], mode=BUILD, duration=0:00:02.193, duration_ms=2
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timestamp=[2026-05-28 18:36:10], mode=BUILD, duration=0:00:06.939, duration_ms=6939, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-28 18:36:18], mode=BUILD, duration=0:00:01.197, duration_ms=1197, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-28 18:36:25], mode=BUILD, duration=0:00:06.800, duration_ms=6800, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 12:11:21], mode=BUILD, duration=0:00:01.756, duration_ms=1756, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 12:12:30], mode=BUILD, duration=0:00:01.836, duration_ms=1836, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 12:12:40], mode=BUILD, duration=0:00:10.066, duration_ms=10066, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:01:44], mode=BUILD, duration=0:00:01.237, duration_ms=1237, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:01:51], mode=BUILD, duration=0:00:07.132, duration_ms=7132, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:04:09], mode=BUILD, duration=0:00:01.170, duration_ms=1170, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:04:16], mode=BUILD, duration=0:00:06.969, duration_ms=6969, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:06:00], mode=BUILD, duration=0:00:01.181, duration_ms=1181, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:06:07], mode=BUILD, duration=0:00:06.894, duration_ms=6894, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:10:02], mode=BUILD, duration=0:00:01.176, duration_ms=1176, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:10:09], mode=BUILD, duration=0:00:06.854, duration_ms=6854, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:46:57], mode=BUILD, duration=0:00:01.200, duration_ms=1200, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:47:05], mode=BUILD, duration=0:00:06.955, duration_ms=6955, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:47:54], mode=BUILD, duration=0:00:01.167, duration_ms=1167, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:48:01], mode=BUILD, duration=0:00:06.885, duration_ms=6885, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:55:33], mode=BUILD, duration=0:00:01.180, duration_ms=1180, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:55:40], mode=BUILD, duration=0:00:06.884, duration_ms=6884, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:56:16], mode=BUILD, duration=0:00:00.686, duration_ms=686, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:56:34], mode=BUILD, duration=0:00:01.831, duration_ms=1831, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:56:41], mode=BUILD, duration=0:00:06.912, duration_ms=6912, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:57:21], mode=BUILD, duration=0:00:01.197, duration_ms=1197, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:57:28], mode=BUILD, duration=0:00:06.962, duration_ms=6962, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:58:53], mode=BUILD, duration=0:00:01.234, duration_ms=1234, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 14:59:00], mode=BUILD, duration=0:00:06.964, duration_ms=6964, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:03:44], mode=BUILD, duration=0:00:01.200, duration_ms=1200, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:03:51], mode=BUILD, duration=0:00:06.941, duration_ms=6941, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:07:59], mode=BUILD, duration=0:00:01.164, duration_ms=1164, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:08:07], mode=BUILD, duration=0:00:06.857, duration_ms=6857, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:10:19], mode=BUILD, duration=0:00:01.205, duration_ms=1205, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:10:26], mode=BUILD, duration=0:00:07.003, duration_ms=7003, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:37:57], mode=BUILD, duration=0:00:01.221, duration_ms=1221, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 15:38:04], mode=BUILD, duration=0:00:07.028, duration_ms=7028, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 16:00:10], mode=BUILD, duration=0:00:01.163, duration_ms=1163, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 16:00:18], mode=BUILD, duration=0:00:07.016, duration_ms=7016, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 18:12:30], mode=BUILD, duration=0:00:01.308, duration_ms=1308, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 18:12:37], mode=BUILD, duration=0:00:07.017, duration_ms=7017, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 18:15:29], mode=BUILD, duration=0:00:01.296, duration_ms=1296, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-05-29 18:15:37], mode=BUILD, duration=0:00:06.847, duration_ms=6847, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 10:58:56], mode=BUILD, duration=0:00:03.478, duration_ms=3478, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 10:59:06], mode=BUILD, duration=0:00:10.189, duration_ms=10189, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 11:00:30], mode=BUILD, duration=0:00:01.283, duration_ms=1283, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 11:00:37], mode=BUILD, duration=0:00:06.900, duration_ms=6900, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 11:02:33], mode=BUILD, duration=0:00:01.183, duration_ms=1183, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 11:02:40], mode=BUILD, duration=0:00:06.897, duration_ms=6897, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 11:02:51], mode=BUILD, duration=0:00:00.668, duration_ms=668, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 11:02:58], mode=BUILD, duration=0:00:01.180, duration_ms=1180, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 11:03:05], mode=BUILD, duration=0:00:06.871, duration_ms=6871, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 13:17:29], mode=BUILD, duration=0:00:01.254, duration_ms=1254, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-01 13:17:37], mode=BUILD, duration=0:00:07.034, duration_ms=7034, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 14:47:53], mode=PLATFORM_GENERATION, duration=0:00:15.437, duration_ms=15437, data={name=NewInstCal_bsp}
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timestamp=[2026-06-02 14:47:55], mode=BUILD, duration=0:00:01.924, duration_ms=1924, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 14:48:03], mode=BUILD, duration=0:00:07.659, duration_ms=7659, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:15:41], mode=BUILD, duration=0:00:01.800, duration_ms=1800, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:15:49], mode=BUILD, duration=0:00:07.302, duration_ms=7302, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:17:06], mode=BUILD, duration=0:00:01.514, duration_ms=1514, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:17:14], mode=BUILD, duration=0:00:07.155, duration_ms=7155, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:24:33], mode=BUILD, duration=0:00:01.196, duration_ms=1196, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:24:40], mode=BUILD, duration=0:00:06.927, duration_ms=6927, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:25:51], mode=BUILD, duration=0:00:01.179, duration_ms=1179, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:25:58], mode=BUILD, duration=0:00:06.831, duration_ms=6831, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:27:45], mode=BUILD, duration=0:00:00.764, duration_ms=764, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:27:55], mode=BUILD, duration=0:00:00.684, duration_ms=684, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:28:03], mode=BUILD, duration=0:00:01.236, duration_ms=1236, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:28:10], mode=BUILD, duration=0:00:06.862, duration_ms=6862, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:31:58], mode=BUILD, duration=0:00:00.703, duration_ms=703, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:33:07], mode=BUILD, duration=0:00:00.732, duration_ms=732, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:33:17], mode=BUILD, duration=0:00:00.744, duration_ms=744, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:33:25], mode=BUILD, duration=0:00:00.682, duration_ms=682, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:33:38], mode=BUILD, duration=0:00:00.731, duration_ms=731, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:33:48], mode=BUILD, duration=0:00:01.242, duration_ms=1242, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:33:56], mode=BUILD, duration=0:00:07.004, duration_ms=7004, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:41:02], mode=BUILD, duration=0:00:01.226, duration_ms=1226, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:41:10], mode=BUILD, duration=0:00:07.023, duration_ms=7023, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:43:20], mode=BUILD, duration=0:00:01.308, duration_ms=1308, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:43:27], mode=BUILD, duration=0:00:06.960, duration_ms=6960, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:48:56], mode=BUILD, duration=0:00:01.230, duration_ms=1230, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:49:04], mode=BUILD, duration=0:00:07.030, duration_ms=7030, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:51:49], mode=BUILD, duration=0:00:01.289, duration_ms=1289, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:51:56], mode=BUILD, duration=0:00:07.167, duration_ms=7167, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:53:38], mode=BUILD, duration=0:00:01.323, duration_ms=1323, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 15:53:45], mode=BUILD, duration=0:00:06.982, duration_ms=6982, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 16:05:07], mode=BUILD, duration=0:00:01.478, duration_ms=1478, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 16:05:15], mode=BUILD, duration=0:00:07.135, duration_ms=7135, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 16:11:57], mode=BUILD, duration=0:00:01.173, duration_ms=1173, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 16:12:04], mode=BUILD, duration=0:00:06.991, duration_ms=6991, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 16:14:32], mode=BUILD, duration=0:00:01.197, duration_ms=1197, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-02 16:14:39], mode=BUILD, duration=0:00:06.965, duration_ms=6965, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:08:27], mode=BUILD, duration=0:00:02.727, duration_ms=2727, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:08:38], mode=BUILD, duration=0:00:10.132, duration_ms=10132, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:32:07], mode=BUILD, duration=0:00:01.285, duration_ms=1285, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:32:15], mode=BUILD, duration=0:00:07.239, duration_ms=7239, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:40:02], mode=BUILD, duration=0:00:00.524, duration_ms=524, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:40:09], mode=BUILD, duration=0:00:06.991, duration_ms=6991, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:40:50], mode=BUILD, duration=0:00:01.623, duration_ms=1623, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-03 17:40:57], mode=BUILD, duration=0:00:06.958, duration_ms=6958, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:30:23], mode=BUILD, duration=0:00:02.758, duration_ms=2758, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:30:34], mode=BUILD, duration=0:00:10.407, duration_ms=10407, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:32:13], mode=PLATFORM_GENERATION, duration=0:00:10.115, duration_ms=10115, data={name=NewInstCal_bsp}
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timestamp=[2026-06-04 14:32:15], mode=BUILD, duration=0:00:01.495, duration_ms=1495, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:32:22], mode=BUILD, duration=0:00:07.120, duration_ms=7120, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:32:44], mode=BUILD, duration=0:00:00.535, duration_ms=535, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:32:52], mode=BUILD, duration=0:00:07.137, duration_ms=7137, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:33:32], mode=PLATFORM_GENERATION, duration=0:00:07.608, duration_ms=7608, data={name=NewInstCal_bsp}
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timestamp=[2026-06-04 14:33:33], mode=BUILD, duration=0:00:00.563, duration_ms=563, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:33:41], mode=BUILD, duration=0:00:07.084, duration_ms=7084, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:35:48], mode=BUILD, duration=0:00:00.535, duration_ms=535, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:35:55], mode=BUILD, duration=0:00:07.025, duration_ms=7025, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:36:05], mode=PLATFORM_GENERATION, duration=0:00:07.671, duration_ms=7671, data={name=NewInstCal_bsp}
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timestamp=[2026-06-04 14:36:05], mode=BUILD, duration=0:00:00.570, duration_ms=570, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:36:13], mode=BUILD, duration=0:00:07.416, duration_ms=7416, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:36:46], mode=PLATFORM_GENERATION, duration=0:00:07.560, duration_ms=7560, data={name=NewInstCal_bsp}
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timestamp=[2026-06-04 14:36:46], mode=BUILD, duration=0:00:00.603, duration_ms=603, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:36:54], mode=BUILD, duration=0:00:07.121, duration_ms=7121, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:38:34], mode=PLATFORM_GENERATION, duration=0:00:22.048, duration_ms=22048, data={name=NewInstCal_bsp}
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timestamp=[2026-06-04 14:38:49], mode=PLATFORM_GENERATION, duration=0:00:13.311, duration_ms=13311, data={name=NewInstCal_bsp}
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timestamp=[2026-06-04 14:40:04], mode=WORKBENCH_START, duration=0:00:07.683, duration_ms=7683, data={}
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timestamp=[2026-06-04 14:40:05], mode=WORKBENCH_UI_INIT, duration=0:00:01.292, duration_ms=1292, data={editors_count=1, platform_editors_count=1, projects_count=4, platform_projects_count=1, active_platform_editor=true, projects=NewInstCal_bsp,NewInstrCalBoard,NewInstrCalBoard_system,RemoteSystemsTempFiles}
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timestamp=[2026-06-04 14:40:05], mode=PLATFORM_REPOSITORY_INIT, duration=0:00:00.598, duration_ms=598, data={}
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timestamp=[2026-06-04 14:41:52], mode=PLATFORM_GENERATION, duration=0:00:14.119, duration_ms=14119, data={name=NewInstCal_bsp}
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timestamp=[2026-06-04 14:41:55], mode=BUILD, duration=0:00:00.533, duration_ms=533, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
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timestamp=[2026-06-04 14:42:03], mode=BUILD, duration=0:00:07.024, duration_ms=7024, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:44:00], mode=PLATFORM_GENERATION, duration=0:00:07.614, duration_ms=7614, data={name=NewInstCal_bsp}
|
||||
timestamp=[2026-06-04 14:44:01], mode=BUILD, duration=0:00:00.540, duration_ms=540, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:44:08], mode=BUILD, duration=0:00:07.156, duration_ms=7156, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:45:15], mode=PLATFORM_GENERATION, duration=0:00:06.811, duration_ms=6811, data={name=NewInstCal_bsp}
|
||||
timestamp=[2026-06-04 14:45:16], mode=BUILD, duration=0:00:00.595, duration_ms=595, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:45:18], mode=BUILD, duration=0:00:02.146, duration_ms=2146, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:45:39], mode=PLATFORM_GENERATION, duration=0:00:10.091, duration_ms=10091, data={name=NewInstCal_bsp}
|
||||
timestamp=[2026-06-04 14:45:40], mode=BUILD, duration=0:00:00.572, duration_ms=572, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:45:45], mode=BUILD, duration=0:00:04.983, duration_ms=4983, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:47:03], mode=PLATFORM_GENERATION, duration=0:00:08.578, duration_ms=8578, data={name=NewInstCal_bsp}
|
||||
timestamp=[2026-06-04 14:47:04], mode=BUILD, duration=0:00:00.569, duration_ms=569, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:47:11], mode=BUILD, duration=0:00:07.111, duration_ms=7111, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:49:23], mode=PLATFORM_GENERATION, duration=0:00:34.426, duration_ms=34426, data={name=NewInstCal_bsp}
|
||||
timestamp=[2026-06-04 14:49:23], mode=BUILD, duration=0:00:00.578, duration_ms=578, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:49:31], mode=BUILD, duration=0:00:07.112, duration_ms=7112, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:53:26], mode=BUILD, duration=0:00:01.328, duration_ms=1328, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:53:33], mode=BUILD, duration=0:00:07.067, duration_ms=7067, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:54:11], mode=BUILD, duration=0:00:00.530, duration_ms=530, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:54:18], mode=BUILD, duration=0:00:06.927, duration_ms=6927, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:57:34], mode=BUILD, duration=0:00:01.252, duration_ms=1252, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 14:57:42], mode=BUILD, duration=0:00:06.944, duration_ms=6944, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 15:07:07], mode=BUILD, duration=0:00:01.234, duration_ms=1234, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 15:07:15], mode=BUILD, duration=0:00:07.098, duration_ms=7098, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 15:08:12], mode=BUILD, duration=0:00:01.189, duration_ms=1189, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-04 15:08:19], mode=BUILD, duration=0:00:06.917, duration_ms=6917, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-16 09:59:46], mode=BUILD, duration=0:00:03.104, duration_ms=3104, data={name=NewInstrCalBoard, configuration=Debug, clean_build=false}
|
||||
timestamp=[2026-06-16 09:59:57], mode=BUILD, duration=0:00:10.666, duration_ms=10666, data={name=NewInstrCalBoard_system, configuration=Debug, clean_build=false}
|
||||
|
||||
@@ -44,3 +44,13 @@ bsp reload
|
||||
catch {bsp regenerate}
|
||||
catch {bsp regenerate}
|
||||
platform generate
|
||||
platform generate -domains zynq_fsbl
|
||||
platform generate -domains zynq_fsbl
|
||||
platform generate -domains zynq_fsbl
|
||||
platform generate -domains zynq_fsbl
|
||||
platform generate -domains zynq_fsbl
|
||||
platform generate
|
||||
platform generate -domains zynq_fsbl
|
||||
platform generate
|
||||
platform generate -domains zynq_fsbl
|
||||
platform generate -domains zynq_fsbl
|
||||
|
||||
Binary file not shown.
@@ -29,7 +29,7 @@
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define FSBL_DEBUG_INFO
|
||||
|
||||
#define DEBUG_GENERAL 0x00000001 /* general debug messages */
|
||||
#define DEBUG_INFO 0x00000002 /* More debug information */
|
||||
|
||||
@@ -151,8 +151,7 @@
|
||||
#endif
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
#define FSBL_DEBUG_INFO
|
||||
#define QSPI_BYPASS
|
||||
//#define QSPI_BYPASS
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
#ifdef XPAR_XWDTPS_0_BASEADDR
|
||||
@@ -376,9 +375,11 @@ int main(void)
|
||||
BootModeRegister &= BOOT_MODES_MASK;
|
||||
|
||||
#ifdef QSPI_BYPASS
|
||||
fsbl_printf(DEBUG_GENERAL,"QSPI BYPASSED!\r\n");
|
||||
BootModeRegister = JTAG_MODE;
|
||||
#else
|
||||
fsbl_printf(DEBUG_GENERAL,"Normal BootModeReg Read\r\n");
|
||||
#endif
|
||||
|
||||
/*
|
||||
* QSPI BOOT MODE
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
@@ -0,0 +1,215 @@
|
||||
#include "CPLD_Con.h"
|
||||
|
||||
int CPLD_Checkin()
|
||||
{
|
||||
int iStatus = -255;
|
||||
u32 ureg_data = 0x0;
|
||||
u8 uCPLD_Count = 3;
|
||||
|
||||
xil_printf("[I] Start CPLD Check In...\r\n");
|
||||
xil_printf("[-]\t Checking CPLD #1\r\n");
|
||||
//Read CPLD IDENT Reg
|
||||
iStatus = CPLD_Read(0x1,0x0,&ureg_data);
|
||||
if (iStatus != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("[E] CPLD #1 Communication Failed!\r\n");
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ureg_data == 0x0)
|
||||
{
|
||||
xil_printf("[E] CPLD #1 Not present! Or SPI communication Failed!\r\n");
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((ureg_data & 0x200000) != 0x200000)
|
||||
{
|
||||
u8 uCID = 0;
|
||||
uCID = (u8)(ureg_data >> 16);
|
||||
xil_printf("[E] CPLD #1 Firmware mismatch!\r\n[D] Expect CPLD ID == 1, but we received CPLD ID = 0x%02X\r\n",uCID);
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
u8 uMajorV = 0;
|
||||
u8 uMinorV = 0;
|
||||
u8 uFixV = 0;
|
||||
|
||||
uMajorV = (u8)((ureg_data & 0x0f00)>>8);
|
||||
uMinorV = (u8)((ureg_data & 0xf0)>>4);
|
||||
uFixV = (u8)(ureg_data & 0xf);
|
||||
|
||||
xil_printf("[I]\t Successfully Found CPLD #1!\r\n");
|
||||
xil_printf("[I]\t CPLD #1 Version: v%02d.%02d.%02d\r\n",uMajorV,uMinorV,uFixV);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
xil_printf("[-]\t Checking CPLD #2\r\n");
|
||||
//Read CPLD IDENT Reg
|
||||
iStatus = CPLD_Read(0x2,0x0,&ureg_data);
|
||||
if (iStatus != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("[E] CPLD #2 Communication Failed!\r\n");
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ureg_data == 0x0)
|
||||
{
|
||||
xil_printf("[E] CPLD #2 Not present! Or SPI communication Failed!\r\n");
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((ureg_data & 0x400000) != 0x400000)
|
||||
{
|
||||
u8 uCID = 0;
|
||||
uCID = (u8)(ureg_data >> 16);
|
||||
xil_printf("[E] CPLD #2 Firmware mismatch!\r\n[D] Expect CPLD ID == 2, but we received CPLD ID = 0x%02X\r\n",uCID);
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
u8 uMajorV = 0;
|
||||
u8 uMinorV = 0;
|
||||
u8 uFixV = 0;
|
||||
|
||||
uMajorV = (u8)((ureg_data & 0x0f00)>>8);
|
||||
uMinorV = (u8)((ureg_data & 0xf0)>>4);
|
||||
uFixV = (u8)(ureg_data & 0xf);
|
||||
|
||||
xil_printf("[I]\t Successfully Found CPLD #2!\r\n");
|
||||
xil_printf("[I]\t CPLD #2 Version: v%02d.%02d.%02d\r\n",uMajorV,uMinorV,uFixV);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
xil_printf("[-]\t Checking CPLD #3\r\n");
|
||||
//Read CPLD IDENT Reg
|
||||
iStatus = CPLD_Read(0x3,0x0,&ureg_data);
|
||||
if (iStatus != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("[E] CPLD #3 Communication Failed!\r\n");
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ureg_data == 0x0)
|
||||
{
|
||||
xil_printf("[E] CPLD #3 Not present! Or SPI communication Failed!\r\n");
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((ureg_data & 0x800000) != 0x800000)
|
||||
{
|
||||
u8 uCID = 0;
|
||||
uCID = (u8)(ureg_data >> 16);
|
||||
xil_printf("[E] CPLD #3 Firmware mismatch! Expect CPLD ID == 3, but we received CPLD ID = 0x%02X\r\n",uCID);
|
||||
uCPLD_Count -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
u8 uMajorV = 0;
|
||||
u8 uMinorV = 0;
|
||||
u8 uFixV = 0;
|
||||
|
||||
uMajorV = (u8)((ureg_data & 0x0f00)>>8);
|
||||
uMinorV = (u8)((ureg_data & 0xf0)>>4);
|
||||
uFixV = (u8)(ureg_data & 0xf);
|
||||
|
||||
xil_printf("[I]\t Successfully Found CPLD #3!\r\n");
|
||||
xil_printf("[I]\t CPLD #3 Version: v%02d.%02d.%02d\r\n",uMajorV,uMinorV,uFixV);
|
||||
}
|
||||
}
|
||||
}
|
||||
if(uCPLD_Count == 3)
|
||||
{
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
else
|
||||
{
|
||||
xil_printf("[E] Only %d/3 CPLD Device is/are healthy\r\n",uCPLD_Count);
|
||||
return XST_DEVICE_NOT_FOUND;
|
||||
}
|
||||
}
|
||||
|
||||
int CPLD_Write(u8 addr,u32 data)
|
||||
{
|
||||
u16 reg_addr = addr | 0x80; //Write bit set to 1'b1
|
||||
u8 reg_data[dat_width] = {0};
|
||||
//Data Sanity Check
|
||||
if ((data >> 24) > 0)
|
||||
{
|
||||
|
||||
xil_printf("[E] CPLD data length should within 24 bits!\r\n");
|
||||
return XST_INVALID_PARAM;
|
||||
}
|
||||
reg_data[0] = (u8)(data >> 16);
|
||||
reg_data[1] = (u8)(((data)&0xff00)>>8);
|
||||
reg_data[2] = (u8)data;
|
||||
spi_write_onewire(reg_addr, reg_data, dat_width, CPLD_U1);
|
||||
spi_write_onewire(reg_addr, reg_data, dat_width, CPLD_U2);
|
||||
spi_write_onewire(reg_addr, reg_data, dat_width, CPLD_U3);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
int CPLD_Read(u8 CPLDSel, u8 reg_addr, u32* reg_data)
|
||||
{
|
||||
switch (CPLDSel)
|
||||
{
|
||||
case 1:
|
||||
{
|
||||
*reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U1);
|
||||
break;
|
||||
}
|
||||
case 2:
|
||||
{
|
||||
*reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U2);
|
||||
break;
|
||||
}
|
||||
case 3:
|
||||
{
|
||||
*reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U3);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
{
|
||||
xil_printf("[E] CPLD Select Num Error (Range 1-3)\r\n");
|
||||
return XST_INVALID_PARAM;
|
||||
}
|
||||
}
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
int CPLD_Read_ALL(u8 reg_addr, u32* reg_data)
|
||||
{
|
||||
//TODO:Sanity Check
|
||||
reg_data[0]=uspi_read_onewire(reg_addr, dat_width,CPLD_U1);
|
||||
reg_data[1]=uspi_read_onewire(reg_addr, dat_width,CPLD_U2);
|
||||
reg_data[2]=uspi_read_onewire(reg_addr, dat_width,CPLD_U3);
|
||||
|
||||
//TODO:SUCCESS Check
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
int CPLD_exec()
|
||||
{
|
||||
u8 reg_addr = 0x01;
|
||||
u8 sw_config_data[3] = {0x00,0x00,0x00};
|
||||
sw_config_data[0] = 0x00;
|
||||
sw_config_data[1] = 0x00;
|
||||
sw_config_data[2] = 0x01;
|
||||
|
||||
reg_addr = reg_addr | 0x80;
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U1);
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U2);
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U3);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,20 @@
|
||||
#ifndef CPLD_CON_H_
|
||||
#define CPLD_CON_H_
|
||||
|
||||
#include <stdio.h>
|
||||
#include <xstatus.h>
|
||||
#include <xparameters.h>
|
||||
#include "GPIO_Driv.h"
|
||||
#include "SPI_Driv.h"
|
||||
|
||||
#define dat_width 3
|
||||
|
||||
int CPLD_Checkin();
|
||||
int CPLD_Write(u8 addr,u32 data);
|
||||
int CPLD_Read(u8 CPLDSel, u8 reg_addr, u32* reg_data);
|
||||
int CPLD_Read_ALL(u8 reg_addr, u32* reg_data);
|
||||
|
||||
int CPLD_exec();
|
||||
|
||||
|
||||
#endif /* CPLD_CON_H_ */
|
||||
@@ -26,7 +26,7 @@ int EMIO_config(void)
|
||||
}
|
||||
else
|
||||
{
|
||||
xil_printf("[I] Successfully Find PS GPIO!\r\n");
|
||||
xil_printf("[D] Successfully Find PS GPIO!\r\n");
|
||||
}
|
||||
|
||||
xStatus = XGpioPs_CfgInitialize(&psGpioInstancePtr,GpioConfigPtr, GpioConfigPtr->BaseAddr);
|
||||
|
||||
@@ -59,7 +59,7 @@ void rst_CPLD(u32* device,u32 num_wire) //wire_num = cs sck sdi/o
|
||||
* device -- CPLD
|
||||
* Return : void
|
||||
******************************************************************************/
|
||||
void spi_write_onewire(char addr, char *data, char width, u32* device)
|
||||
void spi_write_onewire(u8 addr, u8 *data, u8 width, u32* device)
|
||||
{
|
||||
char temp_addr = 0;
|
||||
//u32 temp_data = 0;
|
||||
@@ -128,7 +128,7 @@ void spi_write_onewire(char addr, char *data, char width, u32* device)
|
||||
* data -- 数据
|
||||
* width -- 数据长度
|
||||
* device -- CPLD
|
||||
* Return : void
|
||||
* Return : void //??????
|
||||
******************************************************************************/
|
||||
u32 spi_read_onewire(char addr, char width, u32* device,char* read_data)
|
||||
{
|
||||
@@ -193,6 +193,74 @@ u32 spi_read_onewire(char addr, char width, u32* device,char* read_data)
|
||||
return temp_data;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Function : u32 uspi_read_onewire(char addr, char width, u32* device)
|
||||
* Description : spi onewire read
|
||||
* Parameter : addr -- 地址
|
||||
* width -- 数据长度
|
||||
* device -- CPLD
|
||||
* Return : u32 reg_data
|
||||
******************************************************************************/
|
||||
u32 uspi_read_onewire(char addr, char width, u32* device)
|
||||
{
|
||||
char temp_addr=0;
|
||||
u32 temp_data=0;
|
||||
char i=0,j=0;
|
||||
u32 sck = *(device+0);
|
||||
u32 cs= *(device+1);
|
||||
u32 sdi= *(device+2);
|
||||
u32 sdo= *(device+3);
|
||||
|
||||
temp_addr = addr;
|
||||
|
||||
//XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, cs, 0);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, cs, 0);
|
||||
//XGpioPs_WritePin(&psGpioInstancePtr, sdi, 0); // w/r标志位 1=w 0=r
|
||||
//XGpioPs_WritePin(&psGpioInstancePtr, sck, 1);
|
||||
//XGpioPs_WritePin(&psGpioInstancePtr, sck, 1);
|
||||
|
||||
for(i = 0; i < 8; i++) // 8bit地址
|
||||
{
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
|
||||
if(temp_addr&0x80)
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sdi, 1); //sck低电平传输数据 数据从中间变量到通信线上
|
||||
else
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sdi, 0);
|
||||
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 1);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 1);
|
||||
temp_addr = temp_addr<<1; //sck高电平准备数据,此处为准备第二个数据，第一个数据已经传输完毕
|
||||
}
|
||||
|
||||
for(j=0; j<width; j++)
|
||||
{
|
||||
for(i = 0; i < 8; i++) //nbit数据
|
||||
{
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
|
||||
temp_data = temp_data << 1; //sck低电平准备数据 准备好数位，此时的数据相当于从右边的FPGA移进MCU(先准备好中间变量)
|
||||
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 1);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 1);
|
||||
|
||||
if(XGpioPs_ReadPin(&psGpioInstancePtr,sdo)) //sck高电平接收数据 数据匹配到准备好的数位，等待一起传递到MCU
|
||||
temp_data = temp_data| 0x00000001;
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
}
|
||||
}
|
||||
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sck, 0);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, cs, 1);
|
||||
XGpioPs_WritePin(&psGpioInstancePtr, sdi, 0);
|
||||
return temp_data;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Function : void fourwire_write(u8 txdata, u32 sdi0, u32 sdi1, u32 sdi2, u32 sdi3)
|
||||
* Description : forwire write to reg
|
||||
|
||||
@@ -33,9 +33,11 @@ void rst_CPLD(u32* device,u32 num_wire);
|
||||
|
||||
void rst(char *d);
|
||||
|
||||
void spi_write_onewire(char addr, char *data, char width, u32* device);
|
||||
void spi_write_onewire(u8 addr, u8 *data, u8 width, u32* device);
|
||||
u32 spi_read_onewire(char addr,char width,u32* device,char* read_data);
|
||||
|
||||
u32 uspi_read_onewire(char addr, char width, u32* device);
|
||||
|
||||
void fourwire_write(u8 txdata, u32 sdi0, u32 sdi1, u32 sdi2, u32 sdi3);
|
||||
u16 fourwire_read(u32 sdo0, u32 sdo1, u32 sdo2, u32 sdo3);
|
||||
void spi_write_fourwire(char addr,u16 data,u32* device);
|
||||
|
||||
@@ -6,72 +6,290 @@
|
||||
*/
|
||||
|
||||
#include "cal_meas.h"
|
||||
#include "SPI_Driv.h"
|
||||
char sw_config_data[3] = {0x00,0x00,0x00};
|
||||
|
||||
int Command_Parser(u8* recvbuffer)
|
||||
int Command_Parser(u8* recvbuffer, u8 len)
|
||||
{
|
||||
int iStatus = -255;
|
||||
switch (recvbuffer[0])
|
||||
{
|
||||
case 0x00:
|
||||
{
|
||||
xil_printf("[D] Match Command CPLD Read\r\n");
|
||||
if (len != CPLD_SPI_READ + 1)
|
||||
{
|
||||
xil_printf("[E] Command Length Mismatch!\r\n[I] CPLD Read Format: \"00 [CPLD] [REG Addr]\"\r\n");
|
||||
return XST_INVALID_PARAM;
|
||||
}
|
||||
u32 reg_data = 0x0;
|
||||
iStatus = CPLD_Read(recvbuffer[1], recvbuffer[2], ®_data);
|
||||
xil_printf("[I] CPLD #%d: REG Addr #0x%01X: Data=0x%06X\r\n",recvbuffer[1], recvbuffer[2], reg_data);
|
||||
break;
|
||||
}
|
||||
case 0x01:
|
||||
{
|
||||
xil_printf("[D] Match Command CPLD Write\r\n");
|
||||
if (len != CPLD_SPI_WRITE + 1)
|
||||
{
|
||||
xil_printf("[E] Command Length Mismatch!\r\n[I] CPLD Write Format: \"01 [CPLD] [REG Addr] [Data]\"\r\n");
|
||||
return XST_INVALID_PARAM;
|
||||
}
|
||||
|
||||
xil_printf("[D] TBD!\r\n");
|
||||
break;
|
||||
}
|
||||
case 0xA0:
|
||||
{
|
||||
int iStatus = -255;
|
||||
xil_printf("[D] Matched Command Reset\r\n");
|
||||
rst_CPLD(CPLD_U1,4);
|
||||
rst_CPLD(CPLD_U2,4);
|
||||
rst_CPLD(CPLD_U3,4);
|
||||
xil_printf("[I] CPLD RST Done\r\n");
|
||||
iStatus = CPLD_Checkin();
|
||||
if (iStatus != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("[E] CPLD Check-in Failed!\r\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
xil_printf("[I] All 3/3 CPLD Checked In!\r\n");
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 0xA1: //PMU Cal
|
||||
case 0xA1: //DC Cal
|
||||
{
|
||||
xil_printf("[D] Matched Command DC Cal\r\n");
|
||||
//Command Len Sanity Check
|
||||
if (len != DC_CMD_LEN + 1) //Do NOT forget the command header
|
||||
{
|
||||
xil_printf("[E] Command Length Mismatch!\r\n[I] DC Cal Format: \"A1 [01-04:SLOT] [01:PMU/02:DPS] [0001-0100:Channel_Num] [01:V/02:I] [01-12:RLoad]\"\r\n");
|
||||
return XST_INVALID_PARAM;
|
||||
}
|
||||
DC_Control(recvbuffer + 1); //Op-out the command header
|
||||
break;
|
||||
}
|
||||
case 0xA2: //Freq Cal
|
||||
{
|
||||
|
||||
xil_printf("[D] Matched Command Freq Cal\r\n");
|
||||
if (len > Freq_CMD_LEN + 1) //Do NOT forget the command header
|
||||
{
|
||||
//TODO: ADD Freq Command Format Hint
|
||||
xil_printf("[E] Command Length Mismatch!\r\n[I] Freq Cal Format: TBD\r\n");
|
||||
return XST_INVALID_PARAM;
|
||||
}
|
||||
sw_config(recvbuffer + 1); //Op-out the command header
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
{
|
||||
xil_printf("[E] Command Header No Match! \r\n[D] Received Command Header:0x%02X Check Command!\r\n",recvbuffer[0]);
|
||||
break;
|
||||
return XST_NO_FEATURE;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
int CPLD_Write(u8 addr,u32 data)
|
||||
int DC_Control(u8* idata)
|
||||
{
|
||||
u16 reg_addr = addr | 0x80; //Write bit set to 1'b1
|
||||
//Data Sanity Check
|
||||
if ((data >> 24) > 0)
|
||||
//Comannd Parse Variables
|
||||
u8 u_slot = 0x0;
|
||||
u8 u_m_fun = 0x0; //PMU/DPS Sel
|
||||
u16 u_ch_Num = 0x0;
|
||||
u8 u_vi_Sel = 0x0; //DMM Connection Config
|
||||
u8 u_rLoad = 0x0; //rLoadSel
|
||||
|
||||
//CPLD Variables
|
||||
u8 reg_addr = 0x0;
|
||||
u32 reg_data = 0x0;
|
||||
|
||||
//Flags
|
||||
int Status = -255;
|
||||
int cmdValid = 1;
|
||||
|
||||
//We already did length check, so no need to do again here
|
||||
|
||||
u_slot = idata[0]; //1-4
|
||||
u_m_fun = idata[1]; //1:PMU/2:DPS
|
||||
u_ch_Num = (((u16)(idata[2])) << 8) | idata[3];
|
||||
u_vi_Sel = idata[4]; //1:V/2:I
|
||||
u_rLoad = idata[5]; //1~18: Refer to SCH/Protocol
|
||||
|
||||
//Let's do some sanity check
|
||||
//Slot
|
||||
if (u_slot > 4)
|
||||
{
|
||||
/* code */
|
||||
xil_printf("[E] CPLD data length should within 24 bits!\r\n");
|
||||
xil_printf("[E] Illege Slot Num check Command! (Slot:0(OFF)-4)\r\n");
|
||||
cmdValid = -1;
|
||||
}
|
||||
//Dev Sel
|
||||
if ((u_m_fun > 2) || (u_m_fun == 0))
|
||||
{
|
||||
xil_printf("[E] Illege Dev Select check Command! (1:PMU/2:DPS)\r\n");
|
||||
cmdValid = -2;
|
||||
}
|
||||
//Channel
|
||||
if (u_m_fun == 1) //PMU
|
||||
{
|
||||
|
||||
if ((u_ch_Num < 1) || (u_ch_Num > 256))
|
||||
{
|
||||
|
||||
xil_printf("[E] Illege Channel! (PMU Ch:0x0001-0x0100)\r\n");
|
||||
cmdValid = -2;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((u_ch_Num < 1) || (u_ch_Num > 64))
|
||||
{
|
||||
|
||||
xil_printf("[E] Illege Channel! (DPS Ch:0x0000-0x0040)\r\n");
|
||||
cmdValid = -3;
|
||||
}
|
||||
}
|
||||
|
||||
//V/I Sel
|
||||
if ((u_vi_Sel > 2) || (u_vi_Sel == 0))
|
||||
{
|
||||
xil_printf("[E] Illege V/I Config check Command! (1:V/2:I)\r\n");
|
||||
cmdValid = -5;
|
||||
}
|
||||
//RLoad Sel
|
||||
if (u_rLoad > 18)
|
||||
{
|
||||
xil_printf("[E] Illege RLoad Select check Command! (RLoad:0x00(OPEN)-0x12)\r\n");
|
||||
cmdValid = -6;
|
||||
}
|
||||
if (cmdValid != 1)
|
||||
{
|
||||
|
||||
return XST_INVALID_PARAM;
|
||||
}
|
||||
|
||||
//DEBUG Printout
|
||||
xil_printf("[D] We Got:\r\n[-]\tSlot: #%d\r\n",u_slot);
|
||||
if (u_m_fun == 1)
|
||||
{
|
||||
|
||||
xil_printf("[-]\tDevice Select: PMU\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
xil_printf("[-]\tDevice Select: DPS\r\n");
|
||||
}
|
||||
xil_printf("[-]\tChannel Select: #%d\r\n",u_ch_Num);
|
||||
if (u_vi_Sel == 1)
|
||||
{
|
||||
|
||||
xil_printf("[-]\tDMM Measure Select: Voltage\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
xil_printf("[-]\tDMM Measure Select: Current\r\n");
|
||||
}
|
||||
xil_printf("[-]\tRLoad Select: #%d\r\n",u_rLoad);
|
||||
|
||||
//Sanity Check Done
|
||||
//Let's format the CPLD Reg Data
|
||||
|
||||
//As the structure of DC regs are the same, we can format the data uniformly
|
||||
//Dev Sel
|
||||
if (u_m_fun == 0x2)
|
||||
{
|
||||
reg_data = 0x800000; //1:DPS/0:PMU
|
||||
|
||||
}
|
||||
//V/I Sel
|
||||
if (u_vi_Sel == 0x2)
|
||||
{
|
||||
|
||||
reg_data = reg_data | 0x400000; //1:I/0:V
|
||||
}
|
||||
//RLoad Sel
|
||||
reg_data = reg_data | (((u32)u_rLoad)<<17);
|
||||
//Channel Sel
|
||||
reg_data = reg_data |((u32)(u_ch_Num)<<1) | 0x1; //0x1:Slot_EN
|
||||
|
||||
//We should clear out other slot's enable flag to prevent error
|
||||
Status = 0;
|
||||
//Note here as the CPLD_Write() will smartly set the R/W bit to 1'b1, so no need to handle that here, addr is addr
|
||||
switch (u_slot)
|
||||
{
|
||||
case 1:
|
||||
{
|
||||
|
||||
Status = Status + CPLD_Write(0x07, 0x0);
|
||||
Status = Status + CPLD_Write(0x08, 0x0);
|
||||
Status = Status + CPLD_Write(0x09, 0x0);
|
||||
reg_addr = 0x06;
|
||||
Status = Status + CPLD_Write(reg_addr, reg_data);
|
||||
break;
|
||||
}
|
||||
case 2:
|
||||
{
|
||||
Status = Status + CPLD_Write(0x06, 0x0);
|
||||
Status = Status + CPLD_Write(0x08, 0x0);
|
||||
Status = Status + CPLD_Write(0x09, 0x0);
|
||||
reg_addr = 0x07;
|
||||
Status = Status + CPLD_Write(reg_addr, reg_data);
|
||||
break;
|
||||
}
|
||||
case 3:
|
||||
{
|
||||
Status = Status + CPLD_Write(0x06, 0x0);
|
||||
Status = Status + CPLD_Write(0x07, 0x0);
|
||||
Status = Status + CPLD_Write(0x09, 0x0);
|
||||
reg_addr = 0x08;
|
||||
Status = Status + CPLD_Write(reg_addr, reg_data);
|
||||
break;
|
||||
}
|
||||
case 4:
|
||||
{
|
||||
Status = Status + CPLD_Write(0x06, 0x0);
|
||||
Status = Status + CPLD_Write(0x07, 0x0);
|
||||
Status = Status + CPLD_Write(0x08, 0x0);
|
||||
reg_addr = 0x09;
|
||||
Status = Status + CPLD_Write(reg_addr, reg_data);
|
||||
break;
|
||||
}
|
||||
default: //You should NOT be here
|
||||
{
|
||||
xil_printf("[E] Error Reaching Invaild Slot CPLD Formatting, Check PS Code!\r\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
if (Status != XST_SUCCESS)
|
||||
{
|
||||
|
||||
xil_printf("[E] Error Writing CPLD Reg! Check Log ABOVE!\r\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U1);
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U2);
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U3);
|
||||
}
|
||||
|
||||
int CPLD_exec()
|
||||
{
|
||||
u8 reg_addr = 0x01;
|
||||
else
|
||||
{
|
||||
xil_printf("[D] CPLD Write Successfully Done!\r\n");
|
||||
}
|
||||
|
||||
sw_config_data[0] = 0x00;
|
||||
sw_config_data[1] = 0x00;
|
||||
sw_config_data[2] = 0x01;
|
||||
Status = CPLD_exec();
|
||||
|
||||
reg_addr = reg_addr | 0x80;
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U1);
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U2);
|
||||
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U3);
|
||||
if (Status != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("[E] Error Exec CPLD ! Check Log ABOVE!\r\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
xil_printf("[D] CPLD Exec Successfully Done!\r\n");
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
void sw_config(char *slot_start)
|
||||
{
|
||||
char slot = (*slot_start);
|
||||
@@ -89,6 +307,7 @@ void sw_config(char *slot_start)
|
||||
|
||||
u8 cpld_addr = 0;
|
||||
u32 cpld_dat = 0;
|
||||
u8 sw_config_data[3] = {0x00,0x00,0x00};
|
||||
|
||||
ch_num = (((u16)ch_num_h)<<8) + ((u16)ch_num_l);
|
||||
|
||||
|
||||
@@ -10,15 +10,22 @@
|
||||
|
||||
#include "sleep.h"
|
||||
#include "stdio.h"
|
||||
#include "xstatus.h"
|
||||
#include "xgpiops.h"
|
||||
#include "SPI_Driv.h"
|
||||
|
||||
#include "GPIO_Driv.h"
|
||||
#include "CPLD_Con.h"
|
||||
|
||||
#define CPLD_SPI_WRITE 5
|
||||
#define CPLD_SPI_READ 2
|
||||
#define DC_CMD_LEN 6
|
||||
#define Freq_CMD_LEN 7 //TODO: Update sw_config()!
|
||||
|
||||
#define dat_width 3
|
||||
|
||||
void sw_config(char *slot_start);
|
||||
int Command_Parser(u8 *recvbuffer);
|
||||
int Command_Parser(u8 *recvbuffer, u8 len);
|
||||
int DC_Control(u8* idata);
|
||||
int CPLD_Write(u8 addr,u32 data);
|
||||
int CPLD_exec();
|
||||
void sw_config(char *slot_start);
|
||||
|
||||
|
||||
#endif /* SRC_CAL_MEAS_H_ */
|
||||
|
||||
@@ -41,29 +41,45 @@
|
||||
#include "cal_meas.h"
|
||||
#include "uart_IO.h"
|
||||
|
||||
#define MAJORV 0
|
||||
#define MINORV 1
|
||||
#define FIXV 2
|
||||
|
||||
u8 recvbuffer[1024] = {0};
|
||||
|
||||
int main()
|
||||
{
|
||||
|
||||
int iStatus = -255;
|
||||
init_platform();
|
||||
|
||||
xil_printf("=====================\r\n[I] System Init Done!\r\n");
|
||||
xil_printf("=====================\r\n[I] System Init Done!=====================\r\n");
|
||||
xil_printf("\r\n[I] Zynq Version:NewInstCal v%d.%d.%d\r\n\r\n",MAJORV,MINORV,FIXV);
|
||||
|
||||
xil_printf("[D] Start EMIO Config\r\n");
|
||||
EMIO_config();
|
||||
xil_printf("[D] End of EMIO Config\r\n");
|
||||
|
||||
xil_printf("[D] Config CPLD SPI to known state\r\n");
|
||||
interface_initial(CPLD_U1);
|
||||
interface_initial(CPLD_U2);
|
||||
interface_initial(CPLD_U3);
|
||||
xil_printf("[D] Start CPLD Reset\r\n");
|
||||
rst_CPLD(CPLD_U1,4);
|
||||
rst_CPLD(CPLD_U2,4);
|
||||
rst_CPLD(CPLD_U3,4);
|
||||
xil_printf("[D] End of CPLD Reset\r\n");
|
||||
iStatus = CPLD_Checkin();
|
||||
if (iStatus != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("[E] main() stopped!\r\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
xil_printf("[I] All 3/3 CPLD Checked In!\r\n");
|
||||
}
|
||||
|
||||
|
||||
xil_printf("[D] Config CPLD SPI to known state\r\n");
|
||||
interface_initial(CPLD_U1);
|
||||
interface_initial(CPLD_U2);
|
||||
interface_initial(CPLD_U3);
|
||||
|
||||
xil_printf("[I] Board Init Complete!\r\n[I] Waiting for Command...\r\n");
|
||||
/* receive and process Instructions */
|
||||
@@ -77,7 +93,7 @@ int main()
|
||||
}
|
||||
else if (Status > 0)
|
||||
{
|
||||
Command_Parser(recvbuffer);
|
||||
Command_Parser(recvbuffer,Status); //Here Status should equal to length
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
Binary file not shown.
Reference in New Issue
Block a user