yuysh/NewInstrCalBoard_Zynq
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Moved echo.c -> echo.c.bak

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Removed lwip support from BSP
Added Command_Parser(), CPLD_exec() and CPLD_Write()
This commit is contained in:
yuysh
2026-05-28 18:39:13 +08:00
parent 54777d3fd9
commit 6f02f47407
532 changed files with 130 additions and 179569 deletions
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Vitis_Classic/NewInstrCalBoard/src/cal_meas.c
+63
View File
@@ -9,6 +9,69 @@
#include "SPI_Driv.h"
char sw_config_data[3] = {0x00,0x00,0x00};
int Command_Parser(u8* recvbuffer)
{
switch (recvbuffer[0])
{
case 0xA0:
{
xil_printf("[D] Matched Command Reset\r\n");
rst_CPLD(CPLD_U1,4);
rst_CPLD(CPLD_U2,4);
rst_CPLD(CPLD_U3,4);
xil_printf("[I] CPLD RST Done\r\n");
break;
}
case 0xA1: //PMU Cal
{
break;
}
case 0xA2: //Freq Cal
{
break;
}
default:
{
xil_printf("[E] Command Header No Match! \r\n[D] Received Command Header:0x%02X Check Command!\r\n",recvbuffer[0]);
break;
}
}
}
int CPLD_Write(u8 addr,u32 data)
{
u16 reg_addr = addr | 0x80; //Write bit set to 1'b1
//Data Sanity Check
if ((data >> 24) > 0)
{
/* code */
xil_printf("[E] CPLD data length should within 24 bits!\r\n");
return XST_FAILURE;
}
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U1);
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U2);
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U3);
}
int CPLD_exec()
{
u8 reg_addr = 0x01;
sw_config_data[0] = 0x00;
sw_config_data[1] = 0x00;
sw_config_data[2] = 0x01;
reg_addr = reg_addr | 0x80;
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U1);
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U2);
spi_write_onewire(reg_addr, sw_config_data, dat_width, CPLD_U3);
return XST_SUCCESS;
}
void sw_config(char *slot_start)
{
char slot = (*slot_start);