Jeremy Shen b3eef70c28 CPLD1 fix DMM & OC shifting logic

2026-05-29 17:42:08 +08:00

..

impl1

Modify simulation files

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tb_RelayConTop

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BUS_Con.v

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CPLD1_Debug.rva

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CPLD1_Debug.svf

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CPLD1_Debug.trc

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CPLD1_sim.log

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CPLD_Con.v

CPLD1 fix DMM & OC shifting logic

2026-05-29 17:42:08 +08:00

debug.rvl

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debug.rvs

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NewExtIns_CPLD1.ccl

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NewExtIns_CPLD1.ldf

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NewExtIns_CPLD1.lpf

CPLD1 debug logic too large, delete some signals

2026-05-28 10:29:27 +08:00

NewExtIns_CPLD1.sort

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NewExtInsRelay1.sty

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Reg_file.v

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RelayConTop_tf.v

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RelayConTop.sort

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RelayConTop.sym

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RelayConTop.tfi

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RelayConTop.v

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tb_RelayConTop.sv

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