yuysh/NewInstrCalBoard_CPLD
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases 2 Wiki Activity
17 Commits 1 Branch 2 Tags
3e722a7f154c34aeddb2442faa1c208b1ff780fd
T
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
yuysh 3e722a7f15 Modify simulation files
2026-05-29 16:32:58 +08:00
CPLD1
Modify simulation files
2026-05-29 16:32:58 +08:00
CPLD2
Modify simulation files
2026-05-29 16:32:58 +08:00
CPLD3
Modify simulation files
2026-05-29 16:32:58 +08:00
.gitignore
Update ignored items
2026-05-28 10:41:25 +08:00
S
Description
新仪表校准版CPLD仓库
3.3 MiB
Releases 2
v1.1.2
Latest
2026-06-16 07:01:32 +00:00
Languages
Verilog 49.3%
SystemVerilog 38.9%
TeX 11.8%