yuysh/NewInstrCalBoard_CPLD
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NewInstrCalBoard_CPLD/CPLD1/debug.rvl
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yuysh 263eb9f16d TODO: Fix MISO logic (1/?)
2026-06-01 16:20:38 +08:00

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<Project ModBy="Inserter" SigType="0" Name="C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/CPLD/CPLD1/debug.rvl" Date="2026-06-01">
<IP Version="1_6_042617"/>
<Design DesignEntry="Schematic/Verilog HDL" Synthesis="synplify" DeviceFamily="MachXO2" DesignName="NewExtIns_CPLD1"/>
<Core InsertDataset="0" Insert="1" Reveal_sig="696450588" Name="RelayConTop_LA0" ID="0">
<Setting>
<Clock SampleClk="i_sys_clk" SampleEnable="0" EnableClk="" EnableClk_Pri="0"/>
<TraceBuffer Implementation="0" BitTimeStamp="0" hasTimeStamp="0" IncTrigSig="0" BufferDepth="2048"/>
<Capture Mode="0" MinSamplesPerTrig="8"/>
<Event CntEnable="0" MaxEventCnt="8"/>
<TrigOut Polarity="0" MinPulseWidth="0" TrigOutNetType="1" EnableTrigOut="0" TrigOutNet="reveal_debug_RelayConTop_LA0_net"/>
<DistRAM Disable="0"/>
</Setting>
<Dataset Name="Base">
<Trace>
<Sig Type="SIG" Name="BUS_Con_1/i_cs"/>
<Sig Type="SIG" Name="BUS_Con_1/i_sclk"/>
<Sig Type="SIG" Name="BUS_Con_1/i_mosi"/>
<Bus Name="BUS_Con_1/bit_cnt">
<Sig Type="SIG" Name="BUS_Con_1/bit_cnt:0"/>
<Sig Type="SIG" Name="BUS_Con_1/bit_cnt:1"/>
<Sig Type="SIG" Name="BUS_Con_1/bit_cnt:2"/>
<Sig Type="SIG" Name="BUS_Con_1/bit_cnt:3"/>
<Sig Type="SIG" Name="BUS_Con_1/bit_cnt:4"/>
<Sig Type="SIG" Name="BUS_Con_1/bit_cnt:5"/>
</Bus>
<Bus Name="BUS_Con_1/recv_reg">
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:24"/>
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:25"/>
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:26"/>
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:27"/>
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:28"/>
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:29"/>
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:30"/>
<Sig Type="SIG" Name="BUS_Con_1/recv_reg:31"/>
</Bus>
<Sig Type="SIG" Name="BUS_Con_1/data_ready"/>
<Bus Name="BUS_Con_1/o_addr">
<Sig Type="SIG" Name="BUS_Con_1/o_addr:0"/>
<Sig Type="SIG" Name="BUS_Con_1/o_addr:1"/>
<Sig Type="SIG" Name="BUS_Con_1/o_addr:2"/>
<Sig Type="SIG" Name="BUS_Con_1/o_addr:3"/>
<Sig Type="SIG" Name="BUS_Con_1/o_addr:4"/>
<Sig Type="SIG" Name="BUS_Con_1/o_addr:5"/>
<Sig Type="SIG" Name="BUS_Con_1/o_addr:6"/>
</Bus>
<Sig Type="SIG" Name="BUS_Con_1/i_rvalid"/>
<Bus Name="BUS_Con_1/miso_shift">
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:0"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:1"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:2"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:3"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:4"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:5"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:6"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:7"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:8"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:9"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:10"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:11"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:12"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:13"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:14"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:15"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:16"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:17"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:18"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:19"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:20"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:21"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:22"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:23"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:24"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:25"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:26"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:27"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:28"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:29"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:30"/>
<Sig Type="SIG" Name="BUS_Con_1/miso_shift:31"/>
</Bus>
<Sig Type="SIG" Name="BUS_Con_1/o_miso"/>
<Bus Name="BUS_Con_1/i_rdata">
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:0"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:1"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:2"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:3"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:4"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:5"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:6"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:7"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:8"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:9"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:10"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:11"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:12"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:13"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:14"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:15"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:16"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:17"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:18"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:19"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:20"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:21"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:22"/>
<Sig Type="SIG" Name="BUS_Con_1/i_rdata:23"/>
</Bus>
</Trace>
<Trigger>
<TU Serialbits="0" Type="0" ID="1" Sig="i_rst_n,"/>
<TU Serialbits="0" Type="0" ID="2" Sig="i_cs,"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="1" Resource="0"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="2" Resource="0"/>
</Trigger>
</Dataset>
</Core>
</Project>
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