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yuysh
/
NewInstrCalBoard_CPLD
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36e6eb57684e985e67e4a57fc434a24eff5069cc
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yuysh
36e6eb5768
Unify the OC_Con logic
2026-06-05 16:49:20 +08:00
CPLD1
Unify the OC_Con logic
2026-06-05 16:49:20 +08:00
CPLD2
Fix MISO logic for CPLD2 & CPLD3
2026-06-02 14:50:13 +08:00
CPLD3
Fix version code for CPLD3
2026-06-02 14:50:29 +08:00
.gitignore
Update ignored items
2026-05-28 10:41:25 +08:00
S
Description
新仪表校准版CPLD仓库
3.3
MiB
Releases
2
v1.1.2
Latest
2026-06-16 07:01:32 +00:00
Languages
Verilog
49.3%
SystemVerilog
38.9%
TeX
11.8%