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Fix bugs and Unify the PMU_OC logic

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yuysh
2026-06-09 11:41:21 +08:00
parent 092cad794c
commit e19adb09f9
5 changed files with 33 additions and 56 deletions
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CPLD3/CPLD_Con.v
+5 -5
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@@ -117,19 +117,19 @@ module CPLD_Con (
else if (dc_t == 1'b1) begin
case (dc_slot_flag)
4'b0001: begin
PMU_RC <= 4'b0001;
PMU_RC <= 4'b1110;
end
4'b0010: begin
PMU_RC <= 4'b0010;
PMU_RC <= 4'b1101;
end
4'b0100: begin
PMU_RC <= 4'b0100;
PMU_RC <= 4'b1011;
end
4'b1000: begin
PMU_RC <= 4'b1000;
PMU_RC <= 4'b0111;
end
default:begin
PMU_RC <= 4'b0000;
PMU_RC <= 4'b1111;
end
endcase
end