yuysh/NewInstrCalBoard_CPLD
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases 2 Wiki Activity

Fix CPLD1: PMU Logic bug

Browse Source
This commit is contained in:
yuysh
2026-06-16 14:59:46 +08:00
parent f0f42f0204
commit 37228e2bac
11 changed files with 68162 additions and 28352 deletions
Download Patch File Download Diff File Expand all files Collapse all files
CPLD1/CPLD_Con.v
+13 -13
View File
@@ -358,22 +358,22 @@ module CPLD_Con (
if ((i_DC_Con2[9:1] < 1) || (i_DC_Con2[9:1] > 256)) begin
err_flag <= 1'b1;
end
else begin
//Sanity Check
if ((Channel_2 < 1) || (Channel_2 > 32)) begin
err_flag <= 1'b1;
end
else begin
PMU_OC_2 <= (32'b0000_0000_0000_0000_0000_0000_0000_0001)<<(OC_Shifter2);
DMM_en <= (19'b000_0000_0000_0001_0000)<<(DMM_Shifter2);
end
else begin
PMU_OC_2 <= (32'b0000_0000_0000_0000_0000_0000_0000_0001)<<(OC_Shifter2);
DMM_en <= (19'b000_0000_0000_0001_0000)<<(DMM_Shifter2);
end
end
else if (i_DC_Con2[23] == 1'b1) begin //Select DPS
DPS_FS_2 <= ~(32'b1 << ( Channel_2 - 1));
DPS_FSMC <= 4'b1101;
DPS_FSMMC <= 6'b10_1101;
DPSFS_RC1 <= 1'b0;
//Sanity Check
if ((Channel_2 < 1) || (Channel_2 > 32)) begin
err_flag <= 1'b1;
end
else begin
DPS_FS_2 <= ~(32'b1 << ( Channel_2 - 1));
DPS_FSMC <= 4'b1101;
DPS_FSMMC <= 6'b10_1101;
DPSFS_RC1 <= 1'b0;
end
end
end
end