Revert to default

2026-05-18 13:54:11 +08:00
parent 44b40ab9e1
commit c5df01f33d
50 changed files with 4436 additions and 89 deletions
@@ -0,0 +1,139 @@
+module RelayConTop (
+	input i_sys_clk,
+	input i_rst_n,
+	
+	input i_sclk,
+	input i_mosi,
+	input i_cs,
+	output o_miso,
+	output o_rvalid,
+	input i_rready,
+	input i_wvalid,
+	output o_wready,
+	output o_err,
+	output o_con_done,
+    output [18:0]o_DMM_EN,
+    output o_IO_RC1,
+	output o_RC_T27,
+	output o_RC_T28,
+	output o_RC_T29,
+	output o_RC_T30,
+	output o_RC_T31,
+	output [31:0]o_OC_1,
+	output [31:0]o_OC_2,
+	output [31:0]o_OC_3,
+	output [31:0]o_OC_4
+	
+);
+	wire [3:0]OC_x01;
+	wire [3:0]OC_x17;
+	wire [4:0]RC_Tx;
+
+	wire [18:0]DMM_EN;
+	wire IO_RC1;
+
+
+	wire [23:0]r_data ;
+	wire [23:0]w_data ;
+	wire [6:0]reg_addr ;
+
+	wire cmd_valid;
+	wire reg_busy;
+	wire wr_flag;						//1=write,0=read
+	wire bus_err_flag;
+	wire reg_err_flag;
+	wire cpld_err_flag;
+
+	wire con_exec;
+	wire [23:0]freq1_relay ;
+	wire [23:0]freq2_relay ;
+	wire [23:0]freq3_relay ;
+	wire [23:0]freq4_relay ;
+	wire con_rvalid;
+
+	wire con_done;
+
+	BUS_Con BUS_Con_1(
+		.i_sys_clk(i_sys_clk),
+		.i_rst_n(i_rst_n),
+		.i_sclk(i_sclk),
+		.i_mosi(i_mosi),
+		.i_cs(i_cs),
+		.i_rvalid(con_rvalid),
+		.i_wvalid(i_wvalid),
+		.i_reg_busy(reg_busy),
+		.i_rdata(r_data),
+		.o_cmd_valid(cmd_vaild),
+		.o_wr(wr_flag),
+ 		.o_miso(o_miso),
+		.o_rvalid(o_rvalid),
+		.o_wready(o_wready),
+		.o_data(w_data),
+		.o_addr(reg_addr),
+		.o_err(bus_err_flag)
+	);
+
+	Reg_file CPLD_Reg_1(
+		.i_sys_clk(i_sys_clk),
+		.i_rst_n(i_rst_n),
+		.i_wr_req(cmd_vaild),
+		.i_wr(wr_flag),
+		.i_addr(reg_addr),
+		.i_wdata(w_data),
+		.i_con_done(con_done),                               	//Controller Exec Done
+		.o_freq1(freq1_relay),                            		//Freq_Slot1
+		.o_freq2(freq2_relay),                            		//Freq_Slot2
+		.o_freq3(freq3_relay),                            		//Freq_Slot3 
+		.o_freq4(freq4_relay),									//Freq_Slot4
+		.o_rvalid(con_rvalid),
+		.o_rdata(r_data),
+		.o_exec(con_exec),                                  	//Exec cmd
+		.o_busy(reg_busy),
+		.o_err(reg_err_flag)
+	);
+	
+	CPLD_Con CPLD_Con_1(
+		.i_sys_clk(i_sys_clk),
+		.i_rst_n(i_rst_n),
+		.i_con_exec(con_exec),
+		.i_freq_relay1(freq1_relay),
+		.i_freq_relay2(freq2_relay),
+		.i_freq_relay3(freq3_relay),
+		.i_freq_relay4(freq4_relay),
+		.o_con_done(con_done),
+		.o_OC_x01(OC_x01),
+  		.o_OC_x17(OC_x17),
+		.o_RC_Tx(RC_Tx),
+  		.o_DMM_EN(DMM_EN),
+  		.o_IO_RC1(IO_RC1),
+  		.o_err(cpld_err_flag)
+	);
+
+	assign o_con_done = con_done;
+	//assign o_OC_x01 = OC_x01;
+	assign o_OC_1[0] = OC_x01[0];
+	assign o_OC_2[0] = OC_x01[1];
+	assign o_OC_3[0] = OC_x01[2];
+	assign o_OC_4[0] = OC_x01[3];
+	
+	//assign o_OC_x17 = OC_x17;
+	assign o_OC_1[16] = OC_x17[0];
+	assign o_OC_2[16] = OC_x17[1];
+	assign o_OC_3[16] = OC_x17[2];
+	assign o_OC_4[16] = OC_x17[3];
+
+
+
+	assign o_DMM_EN = DMM_EN;
+	assign o_IO_RC1 = IO_RC1;
+
+	assign o_RC_T27 = RC_Tx[4];
+	assign o_RC_T28 = RC_Tx[3];
+	assign o_RC_T29 = RC_Tx[2];
+	assign o_RC_T30 = RC_Tx[1];
+	assign o_RC_T31 = RC_Tx[0];
+	
+	
+	assign o_err = bus_err_flag || reg_err_flag ||cpld_err_flag;
+	
+endmodule