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CPLD3 implementation

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This commit is contained in:
Jeremy Shen
2026-05-22 16:59:29 +08:00
parent 7f43729caf
commit 99ef0f0e6e
7 changed files with 365 additions and 29 deletions
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2.FW/CPLD3/RelayConTop.v
+19 -4
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@@ -9,15 +9,16 @@ module RelayConTop (
output o_rvaild,
input i_rready,
input i_wvaild,
output [3:0]o_PMU_RC,
output o_wready,
output o_err,
output o_con_done,
output [3:0]o_PMU_RC
output o_con_done
);
wire [3:0]PMU_RC ;
wire [23:0]r_data ;
wire [23:0]w_data ;
wire [6:0]reg_addr ;
@@ -34,8 +35,14 @@ module RelayConTop (
wire [23:0]freq2_relay ;
wire [23:0]freq3_relay ;
wire [23:0]freq4_relay ;
wire con_rvaild;
//DC Control Reg output
wire [23:0]DC_Con1 ;
wire [23:0]DC_Con2 ;
wire [23:0]DC_Con3 ;
wire [23:0]DC_Con4 ;
wire con_rvaild;
wire con_done;
BUS_Con Bus_Con_3(
@@ -70,6 +77,10 @@ module RelayConTop (
.o_freq2(freq2_relay), //Freq_Slot2
.o_freq3(freq3_relay), //Freq_Slot3
.o_freq4(freq4_relay), //Freq_Slot4
.o_DC1(DC_Con1),
.o_DC2(DC_Con2),
.o_DC3(DC_Con3),
.o_DC4(DC_Con4),
.o_rvalid(con_rvalid),
.o_rdata(r_data),
.o_exec(con_exec), //Exec cmd
@@ -81,6 +92,10 @@ module RelayConTop (
.i_sys_clk(i_sys_clk),
.i_rst_n(i_rst_n),
.i_con_exec(con_exec),
.i_DC_Con1(DC_Con1),
.i_DC_Con2(DC_Con2),
.i_DC_Con3(DC_Con3),
.i_DC_Con4(DC_Con4),
.i_freq_relay1(freq1_relay),
.i_freq_relay2(freq2_relay),
.i_freq_relay3(freq3_relay),