✨ feat: flash phase tracking, erase checkbox, flash_model config
Step 2 UI now shows real-time flash operation phases parsed from program_flash output: - Erase: "Performing Erase Operation..." → sf erase → Erased: OK - Program: "Performing Program Operation..." → write blocks 0%→100% - Verify: "Performing Verify Operation..." → read+cmp 0%→100% Configuration additions: - erase_before_program checkbox: controls whether to pre-erase before programming - flash_model: chip type for capacity reference (s25fl256s1 = 32 MiB) subprocess_utils.py now emits 'phase' callbacks (erase/program/verify/done) detected from program_flash output transitions.
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@@ -3,6 +3,8 @@ bootloader_bit_path: /home/ly0kos/work/Verify/FW/tftp_app/bootloader/pl_arm_wrap
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bootloader_elf_path: /home/ly0kos/work/Verify/FW/tftp_app/bootloader/app.elf
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firmware_bin_path: /home/ly0kos/work/Verify/FW/V1.3.1.3.3_06_01_pmu_cpld_check/V1.3.1.3.3_06_01_pmu_cpld_check.bin
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flash_type: qspi-x4-single
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flash_model: s25fl256s1
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erase_before_program: true
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fsbl_elf_path: /home/ly0kos/work/Verify/FPGA/Xilinx/Z100/fsbl_qspi_bypass.elf
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inter_step_delay: 2
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ping_count: 3
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@@ -10,15 +12,14 @@ ping_timeout: 5
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reboot_timeout: 30
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serial_baudrate: 115200
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serial_port: /dev/ttyUSB0
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tftp_upload_name: z7bin
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uart_delay: 3
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inter_step_delay: 2
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step_timeouts:
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bitstream: 60
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check_env: 30
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elf_download: 60
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flash_erase: 120
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flash_program: 600
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bitstream: 60
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elf_download: 60
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tftp_reboot: 120
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vitis_path: ""
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tftp_upload_name: z7bin
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uart_delay: 3
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vitis_path: ''
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zynq_ip: 192.168.100.11
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