✨ feat: UART Monitor standalone window
Replace 'Read Serial' button with 'Open UART' that opens a new UART Monitor window (CTkToplevel) with: - Title bar with status indicator (● connecting/ready/monitoring/error) - Port info display + Start/Stop/Clear buttons - Large scrollable log area (CTkTextbox) with monospace font - Auto-scroll to bottom, line counter in status bar - Boot info parsing (IP, version) shown as [BOOT] prefix - Background serial monitoring via UartMonitor class UART unavailable handling: - On init, tries to open serial port in background thread - If port can't open → shows 'UART 不可用' state with error message - If port opens → shows 'Ready', user clicks Start to begin monitoring Window features: - Modal (grab_set) — focus stays on monitor window - Clean up UartMonitor on close (WM_DELETE_WINDOW handler) - Thread-safe UI updates via after(0, ...) - Reuses existing UartMonitor from serial_monitor.py
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@@ -1,7 +1,7 @@
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bootloader_bin_path: /home/ly0kos/work/Verify/FW/tftp_app/bootloader/bootloader_z100_800M.bin
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bootloader_bit_path: /home/ly0kos/work/Verify/FW/tftp_app/bootloader/pl_arm_wrapper_hw_platform_0/pl_arm_wrapper.bit
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bootloader_elf_path: /home/ly0kos/work/Verify/FW/tftp_app/bootloader/app.elf
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erase_all: false
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erase_all: true
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firmware_bin_path: /home/ly0kos/work/Verify/FW/V1.3.1.3.3_06_01_pmu_cpld_check/V1.3.1.3.3_06_01_pmu_cpld_check.bin
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flash_model: s25fl256s1
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flash_type: qspi-x4-single
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@@ -21,6 +21,5 @@ step_timeouts:
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tftp_reboot: 120
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tftp_upload_name: z7bin
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uart_delay: 3
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xilinx_path: ""
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vitis_path: ''
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xilinx_path: /data/xilinx
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zynq_ip: 192.168.100.11
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