feat: validate JTAG Zynq part matches config.zynq_part (default XC7Z100)

Step 1 now compares detected part (e.g. XC7Z035) against config's
zynq_part. If mismatch: log error, return False to block subsequent
steps. Also returns False when no Zynq detected (was always True).

config.yaml

@@ -1,3 +1,4 @@
+boot_wait_delay: 10
 bootloader_bin_path: /home/ly0kos/work/Verify/FW/tftp_app/bootloader/bootloader_z100_800M.bin
 bootloader_bit_path: /home/ly0kos/work/Verify/FW/tftp_app/bootloader/pl_arm_wrapper_hw_platform_0/pl_arm_wrapper.bit
 bootloader_elf_path: /home/ly0kos/work/Verify/FW/tftp_app/tftp_app/tftp.elf
@@ -21,6 +22,6 @@ step_timeouts:
   tftp_reboot: 120
 tftp_upload_name: z7bin
 uart_delay: 3
-boot_wait_delay: 10
 xilinx_path: /data/xilinx
 zynq_ip: 192.168.100.11
+zynq_part: XC7Z100

src/config_manager.py

@@ -17,6 +17,7 @@ import yaml
 DEFAULT_CONFIG: dict[str, Any] = {
     "xilinx_path": "",
     "zynq_ip": "192.168.100.11",
+    "zynq_part": "XC7Z100",
     "tftp_upload_name": "z7bin",
     "serial_port": "",
     "serial_baudrate": 115200,
@@ -55,6 +56,7 @@ class Config:
 
     xilinx_path: str = ""
     zynq_ip: str = "192.168.100.11"
+    zynq_part: str = "XC7Z100"
     tftp_upload_name: str = "z7bin"
     serial_port: str = ""
     serial_baudrate: int = 115200

src/gui/main_window.py

@@ -811,9 +811,22 @@ class MainWindow(ctk.CTk):
                 self._log_message(f"    - {jtag_dev.name} ({dev_type})")
 
         if jtag_result.is_present:
+            detected_part = jtag_result.devices[0].part_number
+            expected_part = self._config.zynq_part.upper()
+
+            # Validate part number matches expected
+            if detected_part != expected_part:
+                self._log_message(
+                    f"  ✗ Wrong Zynq part: detected {detected_part}, expected {expected_part}"
+                )
+                self._jtag_status.configure(
+                    text=f"JTAG: {detected_part} ≠ {expected_part}", text_color=ERROR_COLOR
+                )
+                return False
+
             self._zynq_jtag_present = True
             self._zynq_jtag_info = jtag_result.devices[0]
-            part = jtag_result.devices[0].part_number
+            part = detected_part
 
             # Log PS and PL detection status
             ps_status = "✓" if jtag_result.ps_detected else "✗"
@@ -828,6 +841,7 @@ class MainWindow(ctk.CTk):
             self._zynq_jtag_info = None
             self._log_message(f"  ✗ Zynq not detected on JTAG: {jtag_result.error}")
             self._jtag_status.configure(text="JTAG: Not detected", text_color=WARNING_COLOR)
+            return False
 
         # Check UART availability
         self._log_message("  Checking UART serial port...")