36 lines
1.3 KiB
Plaintext
36 lines
1.3 KiB
Plaintext
Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
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| Date : Wed May 27 16:40:22 2026
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| Host : mkb running 64-bit unknown
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| Command : report_drc -file system_wrapper_drc_opted.rpt -pb system_wrapper_drc_opted.pb -rpx system_wrapper_drc_opted.rpx
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| Design : system_wrapper
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| Device : xc7z035ffg676-2
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| Speed File : -2
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| Design State : Synthesized
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Report DRC
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Table of Contents
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-----------------
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1. REPORT SUMMARY
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2. REPORT DETAILS
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1. REPORT SUMMARY
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-----------------
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Netlist: netlist
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Floorplan: design_1
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Design limits: <entire design considered>
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Ruledeck: default
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Max violations: <unlimited>
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Violations found: 0
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+------+----------+-------------+------------+
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| Rule | Severity | Description | Violations |
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+------+----------+-------------+------------+
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+------+----------+-------------+------------+
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2. REPORT DETAILS
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-----------------
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