Init Commit
This commit is contained in:
Jeremy Shen
@@ -0,0 +1,936 @@
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set_property SRC_FILE_INFO {cfile:/home/ly0kos/work/prj/New_CalBoard/2.FW/Zynq/Debug_FW/Debug_FW.gen/sources_1/bd/system/ip/system_processing_system7_0_0/system_processing_system7_0_0.xdc rfile:../../../Debug_FW.gen/sources_1/bd/system/ip/system_processing_system7_0_0/system_processing_system7_0_0.xdc id:1 order:EARLY scoped_inst:system_i/processing_system7_0/inst} [current_design]
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set_property SRC_FILE_INFO {cfile:/home/ly0kos/work/prj/New_CalBoard/2.FW/Zynq/Debug_FW/Debug_FW.gen/sources_1/bd/system/ip/system_rst_ps7_0_100M_1/system_rst_ps7_0_100M_1.xdc rfile:../../../Debug_FW.gen/sources_1/bd/system/ip/system_rst_ps7_0_100M_1/system_rst_ps7_0_100M_1.xdc id:2 order:EARLY scoped_inst:system_i/rst_ps7_0_100M/U0} [current_design]
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set_property SRC_FILE_INFO {cfile:/home/ly0kos/work/prj/New_CalBoard/2.FW/Zynq/Debug_FW/Debug_FW.srcs/constrs_1/new/pin_cons.xdc rfile:../../../Debug_FW.srcs/constrs_1/new/pin_cons.xdc id:3} [current_design]
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set_property SRC_FILE_INFO {cfile:/home/ly0kos/work/prj/New_CalBoard/2.FW/Zynq/Debug_FW/Debug_FW.srcs/constrs_1/new/pin_debug.xdc rfile:../../../Debug_FW.srcs/constrs_1/new/pin_debug.xdc id:4} [current_design]
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current_instance system_i/processing_system7_0/inst
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set_property src_info {type:SCOPED_XDC file:1 line:21 export:INPUT save:INPUT read:READ} [current_design]
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set_input_jitter clk_fpga_0 0.3
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set_property src_info {type:SCOPED_XDC file:1 line:31 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "A19" [get_ports "MIO[53]"]
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set_property src_info {type:SCOPED_XDC file:1 line:38 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "A20" [get_ports "MIO[52]"]
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set_property src_info {type:SCOPED_XDC file:1 line:45 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "A18" [get_ports "MIO[49]"]
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set_property src_info {type:SCOPED_XDC file:1 line:52 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "B21" [get_ports "MIO[48]"]
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set_property src_info {type:SCOPED_XDC file:1 line:59 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "B19" [get_ports "MIO[47]"]
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set_property src_info {type:SCOPED_XDC file:1 line:66 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "E17" [get_ports "MIO[46]"]
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set_property src_info {type:SCOPED_XDC file:1 line:73 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "C18" [get_ports "MIO[45]"]
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set_property src_info {type:SCOPED_XDC file:1 line:80 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "E18" [get_ports "MIO[44]"]
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set_property src_info {type:SCOPED_XDC file:1 line:87 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "D18" [get_ports "MIO[43]"]
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set_property src_info {type:SCOPED_XDC file:1 line:94 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F17" [get_ports "MIO[42]"]
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set_property src_info {type:SCOPED_XDC file:1 line:101 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "C19" [get_ports "MIO[41]"]
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set_property src_info {type:SCOPED_XDC file:1 line:108 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "C22" [get_ports "MIO[40]"]
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set_property src_info {type:SCOPED_XDC file:1 line:115 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F18" [get_ports "MIO[27]"]
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set_property src_info {type:SCOPED_XDC file:1 line:122 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "H17" [get_ports "MIO[26]"]
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set_property src_info {type:SCOPED_XDC file:1 line:129 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F19" [get_ports "MIO[25]"]
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set_property src_info {type:SCOPED_XDC file:1 line:136 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "J19" [get_ports "MIO[24]"]
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set_property src_info {type:SCOPED_XDC file:1 line:143 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F20" [get_ports "MIO[23]"]
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set_property src_info {type:SCOPED_XDC file:1 line:150 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G22" [get_ports "MIO[22]"]
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set_property src_info {type:SCOPED_XDC file:1 line:157 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F22" [get_ports "MIO[21]"]
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set_property src_info {type:SCOPED_XDC file:1 line:164 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "H19" [get_ports "MIO[20]"]
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set_property src_info {type:SCOPED_XDC file:1 line:171 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G19" [get_ports "MIO[19]"]
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set_property src_info {type:SCOPED_XDC file:1 line:178 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G20" [get_ports "MIO[18]"]
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set_property src_info {type:SCOPED_XDC file:1 line:185 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G17" [get_ports "MIO[17]"]
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set_property src_info {type:SCOPED_XDC file:1 line:192 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G21" [get_ports "MIO[16]"]
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set_property src_info {type:SCOPED_XDC file:1 line:199 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "A24" [get_ports "MIO[8]"]
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set_property src_info {type:SCOPED_XDC file:1 line:205 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F23" [get_ports "MIO[6]"]
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set_property src_info {type:SCOPED_XDC file:1 line:211 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "C26" [get_ports "MIO[5]"]
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set_property src_info {type:SCOPED_XDC file:1 line:217 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F24" [get_ports "MIO[4]"]
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set_property src_info {type:SCOPED_XDC file:1 line:223 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "D25" [get_ports "MIO[3]"]
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set_property src_info {type:SCOPED_XDC file:1 line:229 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "E25" [get_ports "MIO[2]"]
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set_property src_info {type:SCOPED_XDC file:1 line:235 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "D26" [get_ports "MIO[1]"]
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set_property src_info {type:SCOPED_XDC file:1 line:241 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "W21" [get_ports "DDR_VRP"]
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set_property src_info {type:SCOPED_XDC file:1 line:245 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "V21" [get_ports "DDR_VRN"]
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set_property src_info {type:SCOPED_XDC file:1 line:249 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "V22" [get_ports "DDR_WEB"]
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set_property src_info {type:SCOPED_XDC file:1 line:253 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "V23" [get_ports "DDR_RAS_n"]
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set_property src_info {type:SCOPED_XDC file:1 line:257 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "Y22" [get_ports "DDR_ODT"]
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set_property src_info {type:SCOPED_XDC file:1 line:261 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "H22" [get_ports "DDR_DRSTB"]
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set_property src_info {type:SCOPED_XDC file:1 line:265 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "W24" [get_ports "DDR_DQS[3]"]
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set_property src_info {type:SCOPED_XDC file:1 line:269 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "P25" [get_ports "DDR_DQS[2]"]
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set_property src_info {type:SCOPED_XDC file:1 line:273 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "L24" [get_ports "DDR_DQS[1]"]
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set_property src_info {type:SCOPED_XDC file:1 line:277 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "H24" [get_ports "DDR_DQS[0]"]
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set_property src_info {type:SCOPED_XDC file:1 line:281 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "W25" [get_ports "DDR_DQS_n[3]"]
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set_property src_info {type:SCOPED_XDC file:1 line:285 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "R25" [get_ports "DDR_DQS_n[2]"]
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set_property src_info {type:SCOPED_XDC file:1 line:289 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "L25" [get_ports "DDR_DQS_n[1]"]
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set_property src_info {type:SCOPED_XDC file:1 line:293 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G25" [get_ports "DDR_DQS_n[0]"]
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set_property src_info {type:SCOPED_XDC file:1 line:297 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "L23" [get_ports "DDR_DQ[9]"]
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set_property src_info {type:SCOPED_XDC file:1 line:301 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "K26" [get_ports "DDR_DQ[8]"]
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set_property src_info {type:SCOPED_XDC file:1 line:305 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "J23" [get_ports "DDR_DQ[7]"]
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set_property src_info {type:SCOPED_XDC file:1 line:309 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "J24" [get_ports "DDR_DQ[6]"]
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set_property src_info {type:SCOPED_XDC file:1 line:313 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "H23" [get_ports "DDR_DQ[5]"]
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set_property src_info {type:SCOPED_XDC file:1 line:317 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "H26" [get_ports "DDR_DQ[4]"]
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set_property src_info {type:SCOPED_XDC file:1 line:321 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G26" [get_ports "DDR_DQ[3]"]
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set_property src_info {type:SCOPED_XDC file:1 line:325 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "W23" [get_ports "DDR_DQ[31]"]
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set_property src_info {type:SCOPED_XDC file:1 line:329 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "Y26" [get_ports "DDR_DQ[30]"]
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set_property src_info {type:SCOPED_XDC file:1 line:333 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "J25" [get_ports "DDR_DQ[2]"]
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set_property src_info {type:SCOPED_XDC file:1 line:337 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "Y25" [get_ports "DDR_DQ[29]"]
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set_property src_info {type:SCOPED_XDC file:1 line:341 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "W26" [get_ports "DDR_DQ[28]"]
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set_property src_info {type:SCOPED_XDC file:1 line:345 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "U25" [get_ports "DDR_DQ[27]"]
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set_property src_info {type:SCOPED_XDC file:1 line:349 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "U24" [get_ports "DDR_DQ[26]"]
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set_property src_info {type:SCOPED_XDC file:1 line:353 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "U26" [get_ports "DDR_DQ[25]"]
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set_property src_info {type:SCOPED_XDC file:1 line:357 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "V24" [get_ports "DDR_DQ[24]"]
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set_property src_info {type:SCOPED_XDC file:1 line:361 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "R23" [get_ports "DDR_DQ[23]"]
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set_property src_info {type:SCOPED_XDC file:1 line:365 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "T23" [get_ports "DDR_DQ[22]"]
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set_property src_info {type:SCOPED_XDC file:1 line:369 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "T25" [get_ports "DDR_DQ[21]"]
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set_property src_info {type:SCOPED_XDC file:1 line:373 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "T24" [get_ports "DDR_DQ[20]"]
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set_property src_info {type:SCOPED_XDC file:1 line:377 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "F25" [get_ports "DDR_DQ[1]"]
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set_property src_info {type:SCOPED_XDC file:1 line:381 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "P23" [get_ports "DDR_DQ[19]"]
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set_property src_info {type:SCOPED_XDC file:1 line:385 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "N26" [get_ports "DDR_DQ[18]"]
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set_property src_info {type:SCOPED_XDC file:1 line:389 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "P24" [get_ports "DDR_DQ[17]"]
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set_property src_info {type:SCOPED_XDC file:1 line:393 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "R26" [get_ports "DDR_DQ[16]"]
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set_property src_info {type:SCOPED_XDC file:1 line:397 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "N23" [get_ports "DDR_DQ[15]"]
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set_property src_info {type:SCOPED_XDC file:1 line:401 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "M24" [get_ports "DDR_DQ[14]"]
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set_property src_info {type:SCOPED_XDC file:1 line:405 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "N24" [get_ports "DDR_DQ[13]"]
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set_property src_info {type:SCOPED_XDC file:1 line:409 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "M25" [get_ports "DDR_DQ[12]"]
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set_property src_info {type:SCOPED_XDC file:1 line:413 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "K23" [get_ports "DDR_DQ[11]"]
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set_property src_info {type:SCOPED_XDC file:1 line:417 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "M26" [get_ports "DDR_DQ[10]"]
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set_property src_info {type:SCOPED_XDC file:1 line:421 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "J26" [get_ports "DDR_DQ[0]"]
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set_property src_info {type:SCOPED_XDC file:1 line:425 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "V26" [get_ports "DDR_DM[3]"]
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set_property src_info {type:SCOPED_XDC file:1 line:429 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "P26" [get_ports "DDR_DM[2]"]
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set_property src_info {type:SCOPED_XDC file:1 line:433 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "K25" [get_ports "DDR_DM[1]"]
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set_property src_info {type:SCOPED_XDC file:1 line:437 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "G24" [get_ports "DDR_DM[0]"]
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set_property src_info {type:SCOPED_XDC file:1 line:441 export:INPUT save:INPUT read:READ} [current_design]
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set_property PACKAGE_PIN "Y21" [get_ports "DDR_CS_n"]
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set_property src_info {type:SCOPED_XDC file:1 line:445 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "U21" [get_ports "DDR_CKE"]
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set_property src_info {type:SCOPED_XDC file:1 line:449 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "R21" [get_ports "DDR_Clk"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:453 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "P21" [get_ports "DDR_Clk_n"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:457 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "Y23" [get_ports "DDR_CAS_n"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:461 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "R22" [get_ports "DDR_BankAddr[2]"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:465 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "T22" [get_ports "DDR_BankAddr[1]"]
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set_property src_info {type:SCOPED_XDC file:1 line:469 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "U22" [get_ports "DDR_BankAddr[0]"]
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set_property src_info {type:SCOPED_XDC file:1 line:473 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "U20" [get_ports "DDR_Addr[9]"]
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set_property src_info {type:SCOPED_XDC file:1 line:477 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "T20" [get_ports "DDR_Addr[8]"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:481 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "J21" [get_ports "DDR_Addr[7]"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:485 export:INPUT save:INPUT read:READ} [current_design]
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||||
set_property PACKAGE_PIN "L20" [get_ports "DDR_Addr[6]"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:489 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "N22" [get_ports "DDR_Addr[5]"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:493 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "M20" [get_ports "DDR_Addr[4]"]
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||||
set_property src_info {type:SCOPED_XDC file:1 line:497 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "L22" [get_ports "DDR_Addr[3]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:501 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "N21" [get_ports "DDR_Addr[2]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:505 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "K20" [get_ports "DDR_Addr[1]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:509 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "R20" [get_ports "DDR_Addr[14]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:513 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "J20" [get_ports "DDR_Addr[13]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:517 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "P20" [get_ports "DDR_Addr[12]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:521 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "H21" [get_ports "DDR_Addr[11]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:525 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "M22" [get_ports "DDR_Addr[10]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:529 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "K22" [get_ports "DDR_Addr[0]"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:533 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "C23" [get_ports "PS_PORB"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:536 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "A22" [get_ports "PS_SRSTB"]
|
||||
set_property src_info {type:SCOPED_XDC file:1 line:539 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN "B24" [get_ports "PS_CLK"]
|
||||
current_instance
|
||||
current_instance system_i/rst_ps7_0_100M/U0
|
||||
set_property src_info {type:SCOPED_XDC file:2 line:50 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_waiver -type CDC -id {CDC-11} -user "proc_sys_reset" -desc "Timing uncritical paths" -tags "1171415" -scope -internal -to [get_pins -quiet -filter REF_PIN_NAME=~*D -of_objects [get_cells -hierarchical -filter {NAME =~ */ACTIVE_LOW_AUX.ACT_LO_AUX/GENERATE_LEVEL_P_S_CDC.SINGLE_BIT.CROSS_PLEVEL_IN2SCNDRY_IN_cdc_to}]]
|
||||
current_instance
|
||||
set_property src_info {type:XDC file:3 line:35 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AB21 [get_ports {EMIO_0_tri_io[0]}]
|
||||
set_property src_info {type:XDC file:3 line:36 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN W20 [get_ports {EMIO_0_tri_io[1]}]
|
||||
set_property src_info {type:XDC file:3 line:37 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN Y20 [get_ports {EMIO_0_tri_io[2]}]
|
||||
set_property src_info {type:XDC file:3 line:38 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AE18 [get_ports {EMIO_0_tri_io[3]}]
|
||||
set_property src_info {type:XDC file:3 line:39 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AF18 [get_ports {EMIO_0_tri_io[4]}]
|
||||
set_property src_info {type:XDC file:3 line:40 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AF19 [get_ports {EMIO_0_tri_io[5]}]
|
||||
set_property src_info {type:XDC file:3 line:41 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AE21 [get_ports {EMIO_0_tri_io[6]}]
|
||||
set_property src_info {type:XDC file:3 line:42 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AE20 [get_ports {EMIO_0_tri_io[7]}]
|
||||
set_property src_info {type:XDC file:3 line:43 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AD18 [get_ports {EMIO_0_tri_io[8]}]
|
||||
set_property src_info {type:XDC file:3 line:44 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AD19 [get_ports {EMIO_0_tri_io[9]}]
|
||||
set_property src_info {type:XDC file:3 line:45 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AA22 [get_ports {EMIO_0_tri_io[10]}]
|
||||
set_property src_info {type:XDC file:3 line:47 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AB25 [get_ports {EMIO_0_tri_io[11]}]
|
||||
set_property src_info {type:XDC file:3 line:48 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AD23 [get_ports {EMIO_0_tri_io[12]}]
|
||||
set_property src_info {type:XDC file:3 line:49 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AD20 [get_ports {EMIO_0_tri_io[13]}]
|
||||
set_property src_info {type:XDC file:3 line:50 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AD21 [get_ports {EMIO_0_tri_io[14]}]
|
||||
set_property src_info {type:XDC file:3 line:51 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AC23 [get_ports {EMIO_0_tri_io[15]}]
|
||||
set_property src_info {type:XDC file:3 line:52 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AA25 [get_ports {EMIO_0_tri_io[16]}]
|
||||
set_property src_info {type:XDC file:3 line:53 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AD24 [get_ports {EMIO_0_tri_io[17]}]
|
||||
set_property src_info {type:XDC file:3 line:54 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AC24 [get_ports {EMIO_0_tri_io[18]}]
|
||||
set_property src_info {type:XDC file:3 line:55 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AC21 [get_ports {EMIO_0_tri_io[19]}]
|
||||
set_property src_info {type:XDC file:3 line:56 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AC22 [get_ports {EMIO_0_tri_io[20]}]
|
||||
set_property src_info {type:XDC file:3 line:57 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AF20 [get_ports {EMIO_0_tri_io[21]}]
|
||||
set_property src_info {type:XDC file:3 line:59 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AD10 [get_ports {EMIO_0_tri_io[22]}]
|
||||
set_property src_info {type:XDC file:3 line:60 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AA12 [get_ports {EMIO_0_tri_io[23]}]
|
||||
set_property src_info {type:XDC file:3 line:61 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AF12 [get_ports {EMIO_0_tri_io[24]}]
|
||||
set_property src_info {type:XDC file:3 line:62 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AA13 [get_ports {EMIO_0_tri_io[25]}]
|
||||
set_property src_info {type:XDC file:3 line:63 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AE12 [get_ports {EMIO_0_tri_io[26]}]
|
||||
set_property src_info {type:XDC file:3 line:64 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AE13 [get_ports {EMIO_0_tri_io[27]}]
|
||||
set_property src_info {type:XDC file:3 line:65 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AF13 [get_ports {EMIO_0_tri_io[28]}]
|
||||
set_property src_info {type:XDC file:3 line:66 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AE11 [get_ports {EMIO_0_tri_io[29]}]
|
||||
set_property src_info {type:XDC file:3 line:67 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AF10 [get_ports {EMIO_0_tri_io[30]}]
|
||||
set_property src_info {type:XDC file:3 line:68 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN AE10 [get_ports {EMIO_0_tri_io[31]}]
|
||||
set_property src_info {type:XDC file:3 line:69 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PACKAGE_PIN W13 [get_ports {EMIO_0_tri_io[32]}]
|
||||
set_property src_info {type:XDC file:4 line:79 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_core u_ila_0 ila
|
||||
set_property src_info {type:XDC file:4 line:80 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:81 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property ALL_PROBE_SAME_MU_CNT 4 [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:82 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_ADV_TRIGGER true [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:83 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_DATA_DEPTH 1024 [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:84 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_EN_STRG_QUAL true [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:85 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:86 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:87 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
|
||||
set_property src_info {type:XDC file:4 line:88 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/clk]
|
||||
set_property src_info {type:XDC file:4 line:89 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/clk [get_nets [list system_i/processing_system7_0/inst/FCLK_CLK0]]
|
||||
set_property src_info {type:XDC file:4 line:90 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
|
||||
set_property src_info {type:XDC file:4 line:91 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe0]
|
||||
set_property src_info {type:XDC file:4 line:92 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe0 [get_nets [list EMIO_0_tri_i_0]]
|
||||
set_property src_info {type:XDC file:4 line:93 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:94 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
|
||||
set_property src_info {type:XDC file:4 line:95 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe1]
|
||||
set_property src_info {type:XDC file:4 line:96 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe1 [get_nets [list EMIO_0_tri_i_1]]
|
||||
set_property src_info {type:XDC file:4 line:97 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:98 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
|
||||
set_property src_info {type:XDC file:4 line:99 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe2]
|
||||
set_property src_info {type:XDC file:4 line:100 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe2 [get_nets [list EMIO_0_tri_i_2]]
|
||||
set_property src_info {type:XDC file:4 line:101 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:102 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
|
||||
set_property src_info {type:XDC file:4 line:103 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe3]
|
||||
set_property src_info {type:XDC file:4 line:104 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe3 [get_nets [list EMIO_0_tri_i_3]]
|
||||
set_property src_info {type:XDC file:4 line:105 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:106 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
|
||||
set_property src_info {type:XDC file:4 line:107 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe4]
|
||||
set_property src_info {type:XDC file:4 line:108 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe4 [get_nets [list EMIO_0_tri_i_4]]
|
||||
set_property src_info {type:XDC file:4 line:109 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:110 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
|
||||
set_property src_info {type:XDC file:4 line:111 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe5]
|
||||
set_property src_info {type:XDC file:4 line:112 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe5 [get_nets [list EMIO_0_tri_i_5]]
|
||||
set_property src_info {type:XDC file:4 line:113 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:114 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
|
||||
set_property src_info {type:XDC file:4 line:115 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe6]
|
||||
set_property src_info {type:XDC file:4 line:116 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe6 [get_nets [list EMIO_0_tri_i_6]]
|
||||
set_property src_info {type:XDC file:4 line:117 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:118 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
|
||||
set_property src_info {type:XDC file:4 line:119 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe7]
|
||||
set_property src_info {type:XDC file:4 line:120 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe7 [get_nets [list EMIO_0_tri_i_7]]
|
||||
set_property src_info {type:XDC file:4 line:121 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:122 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
|
||||
set_property src_info {type:XDC file:4 line:123 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe8]
|
||||
set_property src_info {type:XDC file:4 line:124 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe8 [get_nets [list EMIO_0_tri_i_8]]
|
||||
set_property src_info {type:XDC file:4 line:125 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:126 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
|
||||
set_property src_info {type:XDC file:4 line:127 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe9]
|
||||
set_property src_info {type:XDC file:4 line:128 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe9 [get_nets [list EMIO_0_tri_i_9]]
|
||||
set_property src_info {type:XDC file:4 line:129 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:130 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
|
||||
set_property src_info {type:XDC file:4 line:131 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe10]
|
||||
set_property src_info {type:XDC file:4 line:132 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe10 [get_nets [list EMIO_0_tri_i_10]]
|
||||
set_property src_info {type:XDC file:4 line:133 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:134 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
|
||||
set_property src_info {type:XDC file:4 line:135 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe11]
|
||||
set_property src_info {type:XDC file:4 line:136 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe11 [get_nets [list EMIO_0_tri_i_11]]
|
||||
set_property src_info {type:XDC file:4 line:137 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:138 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
|
||||
set_property src_info {type:XDC file:4 line:139 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe12]
|
||||
set_property src_info {type:XDC file:4 line:140 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe12 [get_nets [list EMIO_0_tri_i_12]]
|
||||
set_property src_info {type:XDC file:4 line:141 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:142 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
|
||||
set_property src_info {type:XDC file:4 line:143 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe13]
|
||||
set_property src_info {type:XDC file:4 line:144 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe13 [get_nets [list EMIO_0_tri_i_13]]
|
||||
set_property src_info {type:XDC file:4 line:145 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:146 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
|
||||
set_property src_info {type:XDC file:4 line:147 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe14]
|
||||
set_property src_info {type:XDC file:4 line:148 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe14 [get_nets [list EMIO_0_tri_i_14]]
|
||||
set_property src_info {type:XDC file:4 line:149 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:150 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
|
||||
set_property src_info {type:XDC file:4 line:151 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe15]
|
||||
set_property src_info {type:XDC file:4 line:152 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe15 [get_nets [list EMIO_0_tri_i_15]]
|
||||
set_property src_info {type:XDC file:4 line:153 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:154 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
|
||||
set_property src_info {type:XDC file:4 line:155 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe16]
|
||||
set_property src_info {type:XDC file:4 line:156 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe16 [get_nets [list EMIO_0_tri_i_16]]
|
||||
set_property src_info {type:XDC file:4 line:157 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:158 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
|
||||
set_property src_info {type:XDC file:4 line:159 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe17]
|
||||
set_property src_info {type:XDC file:4 line:160 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe17 [get_nets [list EMIO_0_tri_i_17]]
|
||||
set_property src_info {type:XDC file:4 line:161 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:162 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe18]
|
||||
set_property src_info {type:XDC file:4 line:163 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe18]
|
||||
set_property src_info {type:XDC file:4 line:164 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe18 [get_nets [list EMIO_0_tri_i_18]]
|
||||
set_property src_info {type:XDC file:4 line:165 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:166 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
|
||||
set_property src_info {type:XDC file:4 line:167 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe19]
|
||||
set_property src_info {type:XDC file:4 line:168 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe19 [get_nets [list EMIO_0_tri_i_19]]
|
||||
set_property src_info {type:XDC file:4 line:169 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:170 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe20]
|
||||
set_property src_info {type:XDC file:4 line:171 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe20]
|
||||
set_property src_info {type:XDC file:4 line:172 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe20 [get_nets [list EMIO_0_tri_i_20]]
|
||||
set_property src_info {type:XDC file:4 line:173 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:174 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe21]
|
||||
set_property src_info {type:XDC file:4 line:175 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe21]
|
||||
set_property src_info {type:XDC file:4 line:176 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe21 [get_nets [list EMIO_0_tri_i_21]]
|
||||
set_property src_info {type:XDC file:4 line:177 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:178 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe22]
|
||||
set_property src_info {type:XDC file:4 line:179 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe22]
|
||||
set_property src_info {type:XDC file:4 line:180 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe22 [get_nets [list EMIO_0_tri_i_22]]
|
||||
set_property src_info {type:XDC file:4 line:181 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:182 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe23]
|
||||
set_property src_info {type:XDC file:4 line:183 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe23]
|
||||
set_property src_info {type:XDC file:4 line:184 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe23 [get_nets [list EMIO_0_tri_i_23]]
|
||||
set_property src_info {type:XDC file:4 line:185 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:186 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe24]
|
||||
set_property src_info {type:XDC file:4 line:187 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe24]
|
||||
set_property src_info {type:XDC file:4 line:188 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe24 [get_nets [list EMIO_0_tri_i_24]]
|
||||
set_property src_info {type:XDC file:4 line:189 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:190 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe25]
|
||||
set_property src_info {type:XDC file:4 line:191 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe25]
|
||||
set_property src_info {type:XDC file:4 line:192 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe25 [get_nets [list EMIO_0_tri_i_25]]
|
||||
set_property src_info {type:XDC file:4 line:193 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:194 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe26]
|
||||
set_property src_info {type:XDC file:4 line:195 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe26]
|
||||
set_property src_info {type:XDC file:4 line:196 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe26 [get_nets [list EMIO_0_tri_i_26]]
|
||||
set_property src_info {type:XDC file:4 line:197 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:198 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe27]
|
||||
set_property src_info {type:XDC file:4 line:199 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe27]
|
||||
set_property src_info {type:XDC file:4 line:200 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe27 [get_nets [list EMIO_0_tri_i_27]]
|
||||
set_property src_info {type:XDC file:4 line:201 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:202 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe28]
|
||||
set_property src_info {type:XDC file:4 line:203 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe28]
|
||||
set_property src_info {type:XDC file:4 line:204 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe28 [get_nets [list EMIO_0_tri_i_28]]
|
||||
set_property src_info {type:XDC file:4 line:205 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:206 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe29]
|
||||
set_property src_info {type:XDC file:4 line:207 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe29]
|
||||
set_property src_info {type:XDC file:4 line:208 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe29 [get_nets [list EMIO_0_tri_i_29]]
|
||||
set_property src_info {type:XDC file:4 line:209 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:210 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe30]
|
||||
set_property src_info {type:XDC file:4 line:211 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe30]
|
||||
set_property src_info {type:XDC file:4 line:212 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe30 [get_nets [list EMIO_0_tri_i_30]]
|
||||
set_property src_info {type:XDC file:4 line:213 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:214 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe31]
|
||||
set_property src_info {type:XDC file:4 line:215 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe31]
|
||||
set_property src_info {type:XDC file:4 line:216 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe31 [get_nets [list EMIO_0_tri_i_31]]
|
||||
set_property src_info {type:XDC file:4 line:217 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:218 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe32]
|
||||
set_property src_info {type:XDC file:4 line:219 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe32]
|
||||
set_property src_info {type:XDC file:4 line:220 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe32 [get_nets [list EMIO_0_tri_i_32]]
|
||||
set_property src_info {type:XDC file:4 line:221 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:222 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe33]
|
||||
set_property src_info {type:XDC file:4 line:223 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe33]
|
||||
set_property src_info {type:XDC file:4 line:224 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe33 [get_nets [list EMIO_0_tri_o_0]]
|
||||
set_property src_info {type:XDC file:4 line:225 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:226 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe34]
|
||||
set_property src_info {type:XDC file:4 line:227 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe34]
|
||||
set_property src_info {type:XDC file:4 line:228 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe34 [get_nets [list EMIO_0_tri_o_1]]
|
||||
set_property src_info {type:XDC file:4 line:229 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:230 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe35]
|
||||
set_property src_info {type:XDC file:4 line:231 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe35]
|
||||
set_property src_info {type:XDC file:4 line:232 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe35 [get_nets [list EMIO_0_tri_o_2]]
|
||||
set_property src_info {type:XDC file:4 line:233 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:234 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe36]
|
||||
set_property src_info {type:XDC file:4 line:235 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe36]
|
||||
set_property src_info {type:XDC file:4 line:236 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe36 [get_nets [list EMIO_0_tri_o_3]]
|
||||
set_property src_info {type:XDC file:4 line:237 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:238 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe37]
|
||||
set_property src_info {type:XDC file:4 line:239 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe37]
|
||||
set_property src_info {type:XDC file:4 line:240 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe37 [get_nets [list EMIO_0_tri_o_4]]
|
||||
set_property src_info {type:XDC file:4 line:241 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:242 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe38]
|
||||
set_property src_info {type:XDC file:4 line:243 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe38]
|
||||
set_property src_info {type:XDC file:4 line:244 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe38 [get_nets [list EMIO_0_tri_o_5]]
|
||||
set_property src_info {type:XDC file:4 line:245 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:246 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe39]
|
||||
set_property src_info {type:XDC file:4 line:247 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe39]
|
||||
set_property src_info {type:XDC file:4 line:248 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe39 [get_nets [list EMIO_0_tri_o_6]]
|
||||
set_property src_info {type:XDC file:4 line:249 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:250 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe40]
|
||||
set_property src_info {type:XDC file:4 line:251 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe40]
|
||||
set_property src_info {type:XDC file:4 line:252 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe40 [get_nets [list EMIO_0_tri_o_7]]
|
||||
set_property src_info {type:XDC file:4 line:253 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:254 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe41]
|
||||
set_property src_info {type:XDC file:4 line:255 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe41]
|
||||
set_property src_info {type:XDC file:4 line:256 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe41 [get_nets [list EMIO_0_tri_o_8]]
|
||||
set_property src_info {type:XDC file:4 line:257 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:258 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe42]
|
||||
set_property src_info {type:XDC file:4 line:259 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe42]
|
||||
set_property src_info {type:XDC file:4 line:260 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe42 [get_nets [list EMIO_0_tri_o_9]]
|
||||
set_property src_info {type:XDC file:4 line:261 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:262 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe43]
|
||||
set_property src_info {type:XDC file:4 line:263 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe43]
|
||||
set_property src_info {type:XDC file:4 line:264 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe43 [get_nets [list EMIO_0_tri_o_10]]
|
||||
set_property src_info {type:XDC file:4 line:265 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:266 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe44]
|
||||
set_property src_info {type:XDC file:4 line:267 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe44]
|
||||
set_property src_info {type:XDC file:4 line:268 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe44 [get_nets [list EMIO_0_tri_o_11]]
|
||||
set_property src_info {type:XDC file:4 line:269 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:270 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe45]
|
||||
set_property src_info {type:XDC file:4 line:271 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe45]
|
||||
set_property src_info {type:XDC file:4 line:272 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe45 [get_nets [list EMIO_0_tri_o_12]]
|
||||
set_property src_info {type:XDC file:4 line:273 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:274 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe46]
|
||||
set_property src_info {type:XDC file:4 line:275 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe46]
|
||||
set_property src_info {type:XDC file:4 line:276 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe46 [get_nets [list EMIO_0_tri_o_13]]
|
||||
set_property src_info {type:XDC file:4 line:277 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:278 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe47]
|
||||
set_property src_info {type:XDC file:4 line:279 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe47]
|
||||
set_property src_info {type:XDC file:4 line:280 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe47 [get_nets [list EMIO_0_tri_o_14]]
|
||||
set_property src_info {type:XDC file:4 line:281 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:282 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe48]
|
||||
set_property src_info {type:XDC file:4 line:283 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe48]
|
||||
set_property src_info {type:XDC file:4 line:284 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe48 [get_nets [list EMIO_0_tri_o_15]]
|
||||
set_property src_info {type:XDC file:4 line:285 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:286 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe49]
|
||||
set_property src_info {type:XDC file:4 line:287 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe49]
|
||||
set_property src_info {type:XDC file:4 line:288 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe49 [get_nets [list EMIO_0_tri_o_16]]
|
||||
set_property src_info {type:XDC file:4 line:289 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:290 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe50]
|
||||
set_property src_info {type:XDC file:4 line:291 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe50]
|
||||
set_property src_info {type:XDC file:4 line:292 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe50 [get_nets [list EMIO_0_tri_o_17]]
|
||||
set_property src_info {type:XDC file:4 line:293 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:294 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe51]
|
||||
set_property src_info {type:XDC file:4 line:295 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe51]
|
||||
set_property src_info {type:XDC file:4 line:296 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe51 [get_nets [list EMIO_0_tri_o_18]]
|
||||
set_property src_info {type:XDC file:4 line:297 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:298 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe52]
|
||||
set_property src_info {type:XDC file:4 line:299 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe52]
|
||||
set_property src_info {type:XDC file:4 line:300 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe52 [get_nets [list EMIO_0_tri_o_19]]
|
||||
set_property src_info {type:XDC file:4 line:301 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:302 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe53]
|
||||
set_property src_info {type:XDC file:4 line:303 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe53]
|
||||
set_property src_info {type:XDC file:4 line:304 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe53 [get_nets [list EMIO_0_tri_o_20]]
|
||||
set_property src_info {type:XDC file:4 line:305 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:306 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe54]
|
||||
set_property src_info {type:XDC file:4 line:307 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe54]
|
||||
set_property src_info {type:XDC file:4 line:308 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe54 [get_nets [list EMIO_0_tri_o_21]]
|
||||
set_property src_info {type:XDC file:4 line:309 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:310 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe55]
|
||||
set_property src_info {type:XDC file:4 line:311 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe55]
|
||||
set_property src_info {type:XDC file:4 line:312 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe55 [get_nets [list EMIO_0_tri_o_22]]
|
||||
set_property src_info {type:XDC file:4 line:313 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:314 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe56]
|
||||
set_property src_info {type:XDC file:4 line:315 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe56]
|
||||
set_property src_info {type:XDC file:4 line:316 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe56 [get_nets [list EMIO_0_tri_o_23]]
|
||||
set_property src_info {type:XDC file:4 line:317 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:318 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe57]
|
||||
set_property src_info {type:XDC file:4 line:319 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe57]
|
||||
set_property src_info {type:XDC file:4 line:320 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe57 [get_nets [list EMIO_0_tri_o_24]]
|
||||
set_property src_info {type:XDC file:4 line:321 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:322 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe58]
|
||||
set_property src_info {type:XDC file:4 line:323 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe58]
|
||||
set_property src_info {type:XDC file:4 line:324 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe58 [get_nets [list EMIO_0_tri_o_25]]
|
||||
set_property src_info {type:XDC file:4 line:325 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:326 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe59]
|
||||
set_property src_info {type:XDC file:4 line:327 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe59]
|
||||
set_property src_info {type:XDC file:4 line:328 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe59 [get_nets [list EMIO_0_tri_o_26]]
|
||||
set_property src_info {type:XDC file:4 line:329 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:330 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe60]
|
||||
set_property src_info {type:XDC file:4 line:331 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe60]
|
||||
set_property src_info {type:XDC file:4 line:332 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe60 [get_nets [list EMIO_0_tri_o_27]]
|
||||
set_property src_info {type:XDC file:4 line:333 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:334 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe61]
|
||||
set_property src_info {type:XDC file:4 line:335 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe61]
|
||||
set_property src_info {type:XDC file:4 line:336 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe61 [get_nets [list EMIO_0_tri_o_28]]
|
||||
set_property src_info {type:XDC file:4 line:337 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:338 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe62]
|
||||
set_property src_info {type:XDC file:4 line:339 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe62]
|
||||
set_property src_info {type:XDC file:4 line:340 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe62 [get_nets [list EMIO_0_tri_o_29]]
|
||||
set_property src_info {type:XDC file:4 line:341 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:342 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe63]
|
||||
set_property src_info {type:XDC file:4 line:343 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe63]
|
||||
set_property src_info {type:XDC file:4 line:344 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe63 [get_nets [list EMIO_0_tri_o_30]]
|
||||
set_property src_info {type:XDC file:4 line:345 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:346 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe64]
|
||||
set_property src_info {type:XDC file:4 line:347 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe64]
|
||||
set_property src_info {type:XDC file:4 line:348 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe64 [get_nets [list EMIO_0_tri_o_31]]
|
||||
set_property src_info {type:XDC file:4 line:349 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:350 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe65]
|
||||
set_property src_info {type:XDC file:4 line:351 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe65]
|
||||
set_property src_info {type:XDC file:4 line:352 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe65 [get_nets [list EMIO_0_tri_o_32]]
|
||||
set_property src_info {type:XDC file:4 line:353 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:354 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe66]
|
||||
set_property src_info {type:XDC file:4 line:355 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe66]
|
||||
set_property src_info {type:XDC file:4 line:356 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe66 [get_nets [list EMIO_0_tri_t_0]]
|
||||
set_property src_info {type:XDC file:4 line:357 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:358 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe67]
|
||||
set_property src_info {type:XDC file:4 line:359 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe67]
|
||||
set_property src_info {type:XDC file:4 line:360 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe67 [get_nets [list EMIO_0_tri_t_1]]
|
||||
set_property src_info {type:XDC file:4 line:361 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:362 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe68]
|
||||
set_property src_info {type:XDC file:4 line:363 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe68]
|
||||
set_property src_info {type:XDC file:4 line:364 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe68 [get_nets [list EMIO_0_tri_t_2]]
|
||||
set_property src_info {type:XDC file:4 line:365 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:366 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe69]
|
||||
set_property src_info {type:XDC file:4 line:367 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe69]
|
||||
set_property src_info {type:XDC file:4 line:368 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe69 [get_nets [list EMIO_0_tri_t_3]]
|
||||
set_property src_info {type:XDC file:4 line:369 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:370 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe70]
|
||||
set_property src_info {type:XDC file:4 line:371 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe70]
|
||||
set_property src_info {type:XDC file:4 line:372 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe70 [get_nets [list EMIO_0_tri_t_4]]
|
||||
set_property src_info {type:XDC file:4 line:373 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:374 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe71]
|
||||
set_property src_info {type:XDC file:4 line:375 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe71]
|
||||
set_property src_info {type:XDC file:4 line:376 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe71 [get_nets [list EMIO_0_tri_t_5]]
|
||||
set_property src_info {type:XDC file:4 line:377 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:378 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe72]
|
||||
set_property src_info {type:XDC file:4 line:379 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe72]
|
||||
set_property src_info {type:XDC file:4 line:380 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe72 [get_nets [list EMIO_0_tri_t_6]]
|
||||
set_property src_info {type:XDC file:4 line:381 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:382 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe73]
|
||||
set_property src_info {type:XDC file:4 line:383 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe73]
|
||||
set_property src_info {type:XDC file:4 line:384 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe73 [get_nets [list EMIO_0_tri_t_7]]
|
||||
set_property src_info {type:XDC file:4 line:385 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:386 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe74]
|
||||
set_property src_info {type:XDC file:4 line:387 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe74]
|
||||
set_property src_info {type:XDC file:4 line:388 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe74 [get_nets [list EMIO_0_tri_t_8]]
|
||||
set_property src_info {type:XDC file:4 line:389 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:390 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe75]
|
||||
set_property src_info {type:XDC file:4 line:391 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe75]
|
||||
set_property src_info {type:XDC file:4 line:392 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe75 [get_nets [list EMIO_0_tri_t_9]]
|
||||
set_property src_info {type:XDC file:4 line:393 export:INPUT save:INPUT read:READ} [current_design]
|
||||
create_debug_port u_ila_0 probe
|
||||
set_property src_info {type:XDC file:4 line:394 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe76]
|
||||
set_property src_info {type:XDC file:4 line:395 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property port_width 1 [get_debug_ports u_ila_0/probe76]
|
||||
set_property src_info {type:XDC file:4 line:396 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port u_ila_0/probe76 [get_nets [list EMIO_0_tri_t_10]]
|
||||
set_property src_info {type:XDC file:4 line:397 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
|
||||
set_property src_info {type:XDC file:4 line:398 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
|
||||
set_property src_info {type:XDC file:4 line:399 export:INPUT save:INPUT read:READ} [current_design]
|
||||
set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
|
||||
set_property src_info {type:XDC file:4 line:400 export:INPUT save:INPUT read:READ} [current_design]
|
||||
connect_debug_port dbg_hub/clk [get_nets u_ila_0_FCLK_CLK0]
|
||||
Reference in New Issue
Block a user