<?xml version="1.0" encoding="UTF-8"?>
<Root MajorVersion="0" MinorVersion="43">
  <CompositeFile CompositeFileTopName="system" CanBeSetAsTop="true" CanDisplayChildGraph="true">
    <Description>Composite Fileset</Description>
    <Generation Name="SYNTHESIS" State="GENERATED" Timestamp="1779695252"/>
    <Generation Name="SIMULATION" State="GENERATED" Timestamp="1779695252"/>
    <Generation Name="IMPLEMENTATION" State="GENERATED" Timestamp="1779695252"/>
    <Generation Name="HW_HANDOFF" State="GENERATED" Timestamp="1779695252"/>
    <FileCollection Name="SOURCES" Type="SOURCES">
      <File Name="synth/system.v" Type="Verilog">
        <Properties IsEditable="false" IsVisible="true" IsNetlistSimulation="false" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
        <Library Name="xil_defaultlib"/>
        <UsedIn Val="SYNTHESIS"/>
        <UsedIn Val="IMPLEMENTATION"/>
        <ProcessingOrder Val="NORMAL"/>
      </File>
      <File Name="sim/system.v" Type="Verilog">
        <Properties IsEditable="false" IsVisible="true" IsNetlistSimulation="false" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
        <Library Name="xil_defaultlib"/>
        <UsedIn Val="SIMULATION"/>
        <ProcessingOrder Val="NORMAL"/>
      </File>
      <File Name="system_ooc.xdc" Type="XDC">
        <Properties IsEditable="false" IsVisible="true" IsNetlistSimulation="false" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
        <Library Name="xil_defaultlib"/>
        <UsedIn Val="SYNTHESIS"/>
        <UsedIn Val="IMPLEMENTATION"/>
        <UsedIn Val="OUT_OF_CONTEXT"/>
        <ProcessingOrder Val="NORMAL"/>
      </File>
      <File Name="sim/system.protoinst">
        <Properties IsEditable="false" IsVisible="true" IsNetlistSimulation="false" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
        <Library Name="xil_defaultlib"/>
        <UsedIn Val="SIMULATION"/>
        <ProcessingOrder Val="NORMAL"/>
      </File>
      <File Name="hw_handoff/system.hwh" Type="HwHandoff">
        <Properties IsEditable="false" IsVisible="true" IsNetlistSimulation="false" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
        <Library Name="xil_defaultlib"/>
        <UsedIn Val="HW_HANDOFF"/>
        <ProcessingOrder Val="NORMAL"/>
      </File>
      <File Name="system.bda">
        <Properties IsEditable="false" IsVisible="true" IsNetlistSimulation="false" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
        <Library Name="xil_defaultlib"/>
        <UsedIn Val="HW_HANDOFF"/>
        <ProcessingOrder Val="NORMAL"/>
      </File>
      <File Name="synth/system.hwdef">
        <Properties IsEditable="false" IsVisible="true" IsNetlistSimulation="false" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
        <Library Name="xil_defaultlib"/>
        <UsedIn Val="HW_HANDOFF"/>
        <ProcessingOrder Val="NORMAL"/>
      </File>
    </FileCollection>
  </CompositeFile>
</Root>
