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NewInstrCalBoard_CPLD/CPLD1/impl1/NewExtIns_CPLD1_impl1_synplify.lpf
T
2026-05-28 09:30:38 +08:00

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#
# Logical Preferences generated for Lattice by Synplify map202309lat, Build 191R.
#
# Period Constraints
#FREQUENCY PORT "i_sys_clk" 200.0 MHz;
# Output Constraints
# Input Constraints
# Point-to-point Delay Constraints
# Block Path Constraints
BLOCK ASYNCPATHS;
# End of generated Logical Preferences.