yuysh c828a3b019 Make the CPLD_Con more readable

2026-06-06 15:33:24 +08:00

..

impl1

TODO: Fix MISO logic (1/?)

2026-06-01 16:20:38 +08:00

tb_RelayConTop

Update gitignore

2026-05-27 17:40:07 +08:00

tb_SPI_RegRW

Fix the SPI MISO logic

2026-06-02 11:23:34 +08:00

BUS_Con.v

Fix the SPI MISO logic

2026-06-02 11:23:34 +08:00

CPLD1_Debug.rva

TODO: Fix MISO logic (1/?)

2026-06-01 16:20:38 +08:00

CPLD1_Debug.svf

TODO: Fix MISO logic (1/?)

2026-06-01 16:20:38 +08:00

CPLD1_Debug.trc

TODO: Fix MISO logic (1/?)

2026-06-01 16:20:38 +08:00

CPLD1_sim.log

Init Repo

2026-05-27 17:25:48 +08:00

CPLD_Con.v

Make the CPLD_Con more readable

2026-06-06 15:33:24 +08:00

debug.rvl

TODO: Fix MISO logic (1/?)

2026-06-01 16:20:38 +08:00

debug.rvs

TODO: Fix MISO logic (1/?)

2026-06-01 16:20:38 +08:00

NewExtIns_CPLD1.ccl

Init Repo

2026-05-27 17:25:48 +08:00

NewExtIns_CPLD1.ldf

Fix the SPI MISO logic

2026-06-02 11:23:34 +08:00

NewExtIns_CPLD1.lpf

TODO: Fix MISO logic (1/?)

2026-06-01 16:20:38 +08:00

NewExtIns_CPLD1.sort

Init Repo

2026-05-27 17:25:48 +08:00

NewExtInsRelay1.sty

Init Repo

2026-05-27 17:25:48 +08:00

Reg_file.v

Fix the SPI MISO logic

2026-06-02 11:23:34 +08:00

RelayConTop_tf.v

Init Repo

2026-05-27 17:25:48 +08:00

RelayConTop.sort

Init Repo

2026-05-27 17:25:48 +08:00

RelayConTop.sym

Init Repo

2026-05-27 17:25:48 +08:00

RelayConTop.tfi

Init Repo

2026-05-27 17:25:48 +08:00

RelayConTop.v

Unify the OC_Con logic

2026-06-05 16:49:20 +08:00

tb_RelayConTop.sv

Init Repo

2026-05-27 17:25:48 +08:00

tb_SPI_RegRW.sv

Fix the SPI MISO logic

2026-06-02 11:23:34 +08:00