126 lines
5.9 KiB
Plaintext
126 lines
5.9 KiB
Plaintext
<Project ModBy="Inserter" Name="C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/CPLD/CPLD1/debug.rvl" Date="2026-05-29">
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<Core Name="RelayConTop_LA0">
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<Setting>
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<Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
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<Event EventCnt="0" CntEnableRun="0"/>
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<TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
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</Setting>
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<Dataset Name="Base">
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<Trace>
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<Sig Name="i_rst_n"/>
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<Sig Name="BUS_Con_1/err_flag"/>
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<Sig Name="CPLD_Con_1/err_flag"/>
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<Sig Name="CPLD_Reg_1/err_flag"/>
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<Sig Name="CPLD_Con_1/i_con_exec"/>
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<Bus Name="CPLD_Con_1/i_DC_Con1" Radix="0">
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<Sig Name="CPLD_Con_1/i_DC_Con1:0"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:1"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:2"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:3"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:4"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:5"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:6"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:7"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:8"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:9"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:10"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:11"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:12"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:13"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:14"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:15"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:16"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:17"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:18"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:19"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:20"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:21"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:22"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:23"/>
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</Bus>
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<Bus Name="o_RC_RLSel" Radix="0">
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<Sig Name="o_RC_RLSel:0"/>
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<Sig Name="o_RC_RLSel:1"/>
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<Sig Name="o_RC_RLSel:2"/>
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<Sig Name="o_RC_RLSel:3"/>
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<Sig Name="o_RC_RLSel:4"/>
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<Sig Name="o_RC_RLSel:5"/>
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<Sig Name="o_RC_RLSel:6"/>
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<Sig Name="o_RC_RLSel:7"/>
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<Sig Name="o_RC_RLSel:8"/>
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<Sig Name="o_RC_RLSel:9"/>
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<Sig Name="o_RC_RLSel:10"/>
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<Sig Name="o_RC_RLSel:11"/>
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<Sig Name="o_RC_RLSel:12"/>
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<Sig Name="o_RC_RLSel:13"/>
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<Sig Name="o_RC_RLSel:14"/>
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<Sig Name="o_RC_RLSel:15"/>
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<Sig Name="o_RC_RLSel:16"/>
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<Sig Name="o_RC_RLSel:17"/>
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</Bus>
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<Bus Name="o_PMU_OC_1" Radix="0">
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<Sig Name="o_PMU_OC_1:0"/>
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<Sig Name="o_PMU_OC_1:1"/>
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<Sig Name="o_PMU_OC_1:2"/>
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<Sig Name="o_PMU_OC_1:3"/>
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<Sig Name="o_PMU_OC_1:4"/>
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<Sig Name="o_PMU_OC_1:5"/>
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<Sig Name="o_PMU_OC_1:6"/>
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<Sig Name="o_PMU_OC_1:7"/>
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<Sig Name="o_PMU_OC_1:8"/>
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<Sig Name="o_PMU_OC_1:9"/>
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<Sig Name="o_PMU_OC_1:10"/>
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<Sig Name="o_PMU_OC_1:11"/>
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<Sig Name="o_PMU_OC_1:12"/>
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<Sig Name="o_PMU_OC_1:13"/>
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<Sig Name="o_PMU_OC_1:14"/>
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<Sig Name="o_PMU_OC_1:15"/>
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<Sig Name="o_PMU_OC_1:16"/>
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<Sig Name="o_PMU_OC_1:17"/>
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<Sig Name="o_PMU_OC_1:18"/>
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<Sig Name="o_PMU_OC_1:19"/>
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<Sig Name="o_PMU_OC_1:20"/>
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<Sig Name="o_PMU_OC_1:21"/>
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<Sig Name="o_PMU_OC_1:22"/>
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<Sig Name="o_PMU_OC_1:23"/>
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<Sig Name="o_PMU_OC_1:24"/>
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<Sig Name="o_PMU_OC_1:25"/>
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<Sig Name="o_PMU_OC_1:26"/>
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<Sig Name="o_PMU_OC_1:27"/>
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<Sig Name="o_PMU_OC_1:28"/>
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<Sig Name="o_PMU_OC_1:29"/>
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<Sig Name="o_PMU_OC_1:30"/>
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<Sig Name="o_PMU_OC_1:31"/>
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</Bus>
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<Bus Name="o_DMM_EN" Radix="0">
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<Sig Name="o_DMM_EN:0"/>
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<Sig Name="o_DMM_EN:1"/>
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<Sig Name="o_DMM_EN:2"/>
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<Sig Name="o_DMM_EN:3"/>
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<Sig Name="o_DMM_EN:4"/>
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<Sig Name="o_DMM_EN:5"/>
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<Sig Name="o_DMM_EN:6"/>
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<Sig Name="o_DMM_EN:7"/>
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<Sig Name="o_DMM_EN:8"/>
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<Sig Name="o_DMM_EN:9"/>
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<Sig Name="o_DMM_EN:10"/>
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<Sig Name="o_DMM_EN:11"/>
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<Sig Name="o_DMM_EN:12"/>
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<Sig Name="o_DMM_EN:13"/>
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<Sig Name="o_DMM_EN:14"/>
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<Sig Name="o_DMM_EN:15"/>
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<Sig Name="o_DMM_EN:16"/>
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<Sig Name="o_DMM_EN:17"/>
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<Sig Name="o_DMM_EN:18"/>
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</Bus>
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</Trace>
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<Trigger>
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<TU Operator="7" Name="TU2" ID="1" Value="0" Radix="0"/>
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<TU Operator="6" Name="TU3" ID="2" Value="0" Radix="0"/>
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<TE Enable="1" Expression="TU2" Name="TE2" ID="1"/>
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<TE Enable="1" Expression="TU3" Name="TE3" ID="2"/>
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</Trigger>
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</Dataset>
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</Core>
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</Project>
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