2076 lines
107 KiB
Clojure
2076 lines
107 KiB
Clojure
(edif pmi_ram_dpXbnonesadr4211204842112048p1395c895
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(edifVersion 2 0 0)
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(edifLevel 0)
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(keywordMap (keywordLevel 0))
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(status
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(written
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(timestamp 2026 5 26 15 49 45)
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(program "SCUBA" (version "Diamond (64-bit) 3.14.0.75.2"))))
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(comment "/data/lscc/diamond/3.14/ispfpga/bin/lin64/scuba -w -bus_exp 7 -bb -arch xo2c00 -type bram -wp 10 -rp 0011 -data_width 42 -num_rows 2048 -rdata_width 42 -read_reg1 outreg -gsr DISABLED -reset_rel async -memformat bin -cascade -1 -n pmi_ram_dpXbnonesadr4211204842112048p1395c895 -pmi ")
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(library ORCLIB
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(edifLevel 0)
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(technology
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(numberDefinition))
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(cell FD1P3DX
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(cellType GENERIC)
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(view view1
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(viewType NETLIST)
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(interface
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(port D
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(direction INPUT))
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(port SP
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(direction INPUT))
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(port CK
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(direction INPUT))
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(port CD
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(direction INPUT))
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(port Q
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(direction OUTPUT)))))
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(cell MUX21
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(cellType GENERIC)
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(view view1
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(viewType NETLIST)
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(interface
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(port D0
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(direction INPUT))
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(port D1
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(direction INPUT))
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(port SD
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(direction INPUT))
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(port Z
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(direction OUTPUT)))))
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(cell VHI
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(cellType GENERIC)
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(view view1
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(viewType NETLIST)
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(interface
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(port Z
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(direction OUTPUT)))))
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(cell VLO
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(cellType GENERIC)
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(view view1
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(viewType NETLIST)
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(interface
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(port Z
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(direction OUTPUT)))))
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(cell DP8KC
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(cellType GENERIC)
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(view view1
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(viewType NETLIST)
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(interface
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(port DIA8
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(direction INPUT))
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(port DIA7
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(direction INPUT))
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(port DIA6
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(direction INPUT))
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(port DIA5
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(direction INPUT))
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(port DIA4
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(direction INPUT))
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(port DIA3
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(direction INPUT))
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(port DIA2
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(direction INPUT))
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(port DIA1
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(direction INPUT))
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(port DIA0
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(direction INPUT))
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(port ADA12
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(direction INPUT))
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(port ADA11
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(direction INPUT))
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(port ADA10
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(direction INPUT))
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(port ADA9
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(direction INPUT))
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(port ADA8
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(direction INPUT))
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(port ADA7
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(direction INPUT))
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(port ADA6
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(direction INPUT))
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(port ADA5
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(direction INPUT))
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(port ADA4
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(direction INPUT))
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(port ADA3
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(direction INPUT))
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(port ADA2
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(direction INPUT))
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(port ADA1
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(direction INPUT))
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(port ADA0
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(direction INPUT))
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(port CEA
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(direction INPUT))
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(port OCEA
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(direction INPUT))
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(port CLKA
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(direction INPUT))
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(port WEA
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(direction INPUT))
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(port CSA2
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(direction INPUT))
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(port CSA1
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(direction INPUT))
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(port CSA0
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(direction INPUT))
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(port RSTA
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(direction INPUT))
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(port DIB8
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(direction INPUT))
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(port DIB7
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(direction INPUT))
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(port DIB6
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(direction INPUT))
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(port DIB5
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(direction INPUT))
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(port DIB4
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(direction INPUT))
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(port DIB3
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(direction INPUT))
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(port DIB2
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(direction INPUT))
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(port DIB1
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(direction INPUT))
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(port DIB0
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(direction INPUT))
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(port ADB12
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(direction INPUT))
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(port ADB11
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(direction INPUT))
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(port ADB10
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(direction INPUT))
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(port ADB9
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(direction INPUT))
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(port ADB8
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(direction INPUT))
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(port ADB7
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(direction INPUT))
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(port ADB6
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(direction INPUT))
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(port ADB5
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(direction INPUT))
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(port ADB4
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(direction INPUT))
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(port ADB3
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(direction INPUT))
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(port ADB2
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(direction INPUT))
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(port ADB1
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(direction INPUT))
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(port ADB0
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(direction INPUT))
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(port CEB
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(direction INPUT))
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(port OCEB
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(direction INPUT))
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(port CLKB
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(direction INPUT))
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(port WEB
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(direction INPUT))
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(port CSB2
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(direction INPUT))
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(port CSB1
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(direction INPUT))
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(port CSB0
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(direction INPUT))
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(port RSTB
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(direction INPUT))
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(port DOA8
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(direction OUTPUT))
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(port DOA7
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(direction OUTPUT))
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(port DOA6
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(direction OUTPUT))
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(port DOA5
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(direction OUTPUT))
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(port DOA4
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(direction OUTPUT))
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(port DOA3
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(direction OUTPUT))
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(port DOA2
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(direction OUTPUT))
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(port DOA1
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(direction OUTPUT))
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(port DOA0
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(direction OUTPUT))
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(port DOB8
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(direction OUTPUT))
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(port DOB7
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(direction OUTPUT))
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(port DOB6
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(direction OUTPUT))
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(port DOB5
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(direction OUTPUT))
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(port DOB4
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(direction OUTPUT))
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(port DOB3
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(direction OUTPUT))
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(port DOB2
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(direction OUTPUT))
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(port DOB1
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(direction OUTPUT))
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(port DOB0
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(direction OUTPUT)))))
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(cell pmi_ram_dpXbnonesadr4211204842112048p1395c895
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(cellType GENERIC)
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(view view1
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(viewType NETLIST)
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(interface
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(port (array (rename WrAddress "WrAddress(10:0)") 11)
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(direction INPUT))
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(port (array (rename RdAddress "RdAddress(10:0)") 11)
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(direction INPUT))
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(port (array (rename Data "Data(41:0)") 42)
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(direction INPUT))
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(port WE
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(direction INPUT))
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(port RdClock
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(direction INPUT))
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(port RdClockEn
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(direction INPUT))
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(port Reset
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(direction INPUT))
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(port WrClock
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(direction INPUT))
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(port WrClockEn
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(direction INPUT))
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(port (array (rename Q "Q(41:0)") 42)
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(direction OUTPUT)))
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(property NGD_DRC_MASK (integer 1))
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(contents
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(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9
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(viewRef view1
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(cellRef DP8KC))
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(property INIT_DATA
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|
(string "STATIC"))
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|
(property ASYNC_RESET_RELEASE
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|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b000"))
|
|
(property CSDECODE_A
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|
(string "0b000"))
|
|
(property WRITEMODE_B
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|
(string "NORMAL"))
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|
(property WRITEMODE_A
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|
(string "NORMAL"))
|
|
(property GSR
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|
(string "ENABLED"))
|
|
(property RESETMODE
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|
(string "ASYNC"))
|
|
(property REGMODE_B
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|
(string "OUTREG"))
|
|
(property REGMODE_A
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|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
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|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8
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|
(viewRef view1
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|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b000"))
|
|
(property CSDECODE_A
|
|
(string "0b000"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b000"))
|
|
(property CSDECODE_A
|
|
(string "0b000"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b000"))
|
|
(property CSDECODE_A
|
|
(string "0b000"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b000"))
|
|
(property CSDECODE_A
|
|
(string "0b000"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b001"))
|
|
(property CSDECODE_A
|
|
(string "0b001"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b001"))
|
|
(property CSDECODE_A
|
|
(string "0b001"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b001"))
|
|
(property CSDECODE_A
|
|
(string "0b001"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b001"))
|
|
(property CSDECODE_A
|
|
(string "0b001"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance scuba_vhi_inst
|
|
(viewRef view1
|
|
(cellRef VHI)))
|
|
(instance pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "ASYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "pmi_ram_dpXbnonesadr4211204842112048p1395c895__PMIP__2048__42__42__-1B"))
|
|
(property MEM_INIT_FILE
|
|
(string ""))
|
|
(property CSDECODE_B
|
|
(string "0b001"))
|
|
(property CSDECODE_A
|
|
(string "0b001"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "NORMAL"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "OUTREG"))
|
|
(property REGMODE_A
|
|
(string "OUTREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance FF_1
|
|
(viewRef view1
|
|
(cellRef FD1P3DX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance scuba_vlo_inst
|
|
(viewRef view1
|
|
(cellRef VLO)))
|
|
(instance FF_0
|
|
(viewRef view1
|
|
(cellRef FD1P3DX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance mux_41
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_40
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_39
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_38
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_37
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_36
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_35
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_34
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_33
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_32
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_31
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_30
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_29
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_28
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_27
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_26
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_25
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_24
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_23
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_22
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_21
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_20
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_19
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_18
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_17
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_16
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_15
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_14
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_13
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_12
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_11
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_10
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_9
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_8
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_7
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_6
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_5
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_4
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_3
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_2
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_1
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(instance mux_0
|
|
(viewRef view1
|
|
(cellRef MUX21)))
|
|
(net scuba_vhi
|
|
(joined
|
|
(portRef Z (instanceRef scuba_vhi_inst))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net scuba_vlo
|
|
(joined
|
|
(portRef Z (instanceRef scuba_vlo_inst))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CSB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef CSA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef CSB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef CSA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef WEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef ADB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef ADA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef ADB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef ADA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef ADB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef DIB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef CD (instanceRef FF_1))
|
|
(portRef CD (instanceRef FF_0))))
|
|
(net raddr10_ff
|
|
(joined
|
|
(portRef D (instanceRef FF_0))
|
|
(portRef Q (instanceRef FF_1))))
|
|
(net mdout1_1_0
|
|
(joined
|
|
(portRef D1 (instanceRef mux_41))
|
|
(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_0
|
|
(joined
|
|
(portRef D0 (instanceRef mux_41))
|
|
(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_1
|
|
(joined
|
|
(portRef D1 (instanceRef mux_40))
|
|
(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_1
|
|
(joined
|
|
(portRef D0 (instanceRef mux_40))
|
|
(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_2
|
|
(joined
|
|
(portRef D1 (instanceRef mux_39))
|
|
(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_2
|
|
(joined
|
|
(portRef D0 (instanceRef mux_39))
|
|
(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_3
|
|
(joined
|
|
(portRef D1 (instanceRef mux_38))
|
|
(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_3
|
|
(joined
|
|
(portRef D0 (instanceRef mux_38))
|
|
(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_4
|
|
(joined
|
|
(portRef D1 (instanceRef mux_37))
|
|
(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_4
|
|
(joined
|
|
(portRef D0 (instanceRef mux_37))
|
|
(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_5
|
|
(joined
|
|
(portRef D1 (instanceRef mux_36))
|
|
(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_5
|
|
(joined
|
|
(portRef D0 (instanceRef mux_36))
|
|
(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_6
|
|
(joined
|
|
(portRef D1 (instanceRef mux_35))
|
|
(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_6
|
|
(joined
|
|
(portRef D0 (instanceRef mux_35))
|
|
(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_7
|
|
(joined
|
|
(portRef D1 (instanceRef mux_34))
|
|
(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_7
|
|
(joined
|
|
(portRef D0 (instanceRef mux_34))
|
|
(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_8
|
|
(joined
|
|
(portRef D1 (instanceRef mux_33))
|
|
(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net mdout1_0_8
|
|
(joined
|
|
(portRef D0 (instanceRef mux_33))
|
|
(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))))
|
|
(net mdout1_1_9
|
|
(joined
|
|
(portRef D1 (instanceRef mux_32))
|
|
(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_9
|
|
(joined
|
|
(portRef D0 (instanceRef mux_32))
|
|
(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_10
|
|
(joined
|
|
(portRef D1 (instanceRef mux_31))
|
|
(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_10
|
|
(joined
|
|
(portRef D0 (instanceRef mux_31))
|
|
(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_11
|
|
(joined
|
|
(portRef D1 (instanceRef mux_30))
|
|
(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_11
|
|
(joined
|
|
(portRef D0 (instanceRef mux_30))
|
|
(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_12
|
|
(joined
|
|
(portRef D1 (instanceRef mux_29))
|
|
(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_12
|
|
(joined
|
|
(portRef D0 (instanceRef mux_29))
|
|
(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_13
|
|
(joined
|
|
(portRef D1 (instanceRef mux_28))
|
|
(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_13
|
|
(joined
|
|
(portRef D0 (instanceRef mux_28))
|
|
(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_14
|
|
(joined
|
|
(portRef D1 (instanceRef mux_27))
|
|
(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_14
|
|
(joined
|
|
(portRef D0 (instanceRef mux_27))
|
|
(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_15
|
|
(joined
|
|
(portRef D1 (instanceRef mux_26))
|
|
(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_15
|
|
(joined
|
|
(portRef D0 (instanceRef mux_26))
|
|
(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_16
|
|
(joined
|
|
(portRef D1 (instanceRef mux_25))
|
|
(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_16
|
|
(joined
|
|
(portRef D0 (instanceRef mux_25))
|
|
(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_17
|
|
(joined
|
|
(portRef D1 (instanceRef mux_24))
|
|
(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net mdout1_0_17
|
|
(joined
|
|
(portRef D0 (instanceRef mux_24))
|
|
(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))))
|
|
(net mdout1_1_18
|
|
(joined
|
|
(portRef D1 (instanceRef mux_23))
|
|
(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net mdout1_0_18
|
|
(joined
|
|
(portRef D0 (instanceRef mux_23))
|
|
(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
|
|
(net mdout1_1_19
|
|
(joined
|
|
(portRef D1 (instanceRef mux_22))
|
|
(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net mdout1_0_19
|
|
(joined
|
|
(portRef D0 (instanceRef mux_22))
|
|
(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
|
|
(net mdout1_1_20
|
|
(joined
|
|
(portRef D1 (instanceRef mux_21))
|
|
(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net mdout1_0_20
|
|
(joined
|
|
(portRef D0 (instanceRef mux_21))
|
|
(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
|
|
(net mdout1_1_21
|
|
(joined
|
|
(portRef D1 (instanceRef mux_20))
|
|
(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net mdout1_0_21
|
|
(joined
|
|
(portRef D0 (instanceRef mux_20))
|
|
(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
|
|
(net mdout1_1_22
|
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(joined
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(portRef D1 (instanceRef mux_19))
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(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
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(net mdout1_0_22
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(joined
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(portRef D0 (instanceRef mux_19))
|
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(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
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(net mdout1_1_23
|
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(joined
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(portRef D1 (instanceRef mux_18))
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(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
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(net mdout1_0_23
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(joined
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(portRef D0 (instanceRef mux_18))
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(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
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(net mdout1_1_24
|
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(joined
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(portRef D1 (instanceRef mux_17))
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(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
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(net mdout1_0_24
|
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(joined
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(portRef D0 (instanceRef mux_17))
|
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(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
|
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(net mdout1_1_25
|
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(joined
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(portRef D1 (instanceRef mux_16))
|
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(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
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(net mdout1_0_25
|
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(joined
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(portRef D0 (instanceRef mux_16))
|
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(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
|
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(net mdout1_1_26
|
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(joined
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(portRef D1 (instanceRef mux_15))
|
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(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
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(net mdout1_0_26
|
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(joined
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(portRef D0 (instanceRef mux_15))
|
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(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))))
|
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(net mdout1_1_27
|
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(joined
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(portRef D1 (instanceRef mux_14))
|
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(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
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(net mdout1_0_27
|
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(joined
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(portRef D0 (instanceRef mux_14))
|
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(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
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(net mdout1_1_28
|
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(joined
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(portRef D1 (instanceRef mux_13))
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(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_28
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(joined
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(portRef D0 (instanceRef mux_13))
|
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(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
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(net mdout1_1_29
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(joined
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(portRef D1 (instanceRef mux_12))
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(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_29
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(joined
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(portRef D0 (instanceRef mux_12))
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(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
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(net mdout1_1_30
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(joined
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(portRef D1 (instanceRef mux_11))
|
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(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_30
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(joined
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(portRef D0 (instanceRef mux_11))
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(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
|
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(net mdout1_1_31
|
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(joined
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(portRef D1 (instanceRef mux_10))
|
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(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_31
|
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(joined
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(portRef D0 (instanceRef mux_10))
|
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(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
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(net mdout1_1_32
|
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(joined
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(portRef D1 (instanceRef mux_9))
|
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(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_32
|
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(joined
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(portRef D0 (instanceRef mux_9))
|
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(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
|
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(net mdout1_1_33
|
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(joined
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(portRef D1 (instanceRef mux_8))
|
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(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_33
|
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(joined
|
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(portRef D0 (instanceRef mux_8))
|
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(portRef DOB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
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(net mdout1_1_34
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(joined
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(portRef D1 (instanceRef mux_7))
|
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(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_34
|
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(joined
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(portRef D0 (instanceRef mux_7))
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(portRef DOB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
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(net mdout1_1_35
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(joined
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(portRef D1 (instanceRef mux_6))
|
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(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
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(net mdout1_0_35
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(joined
|
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(portRef D0 (instanceRef mux_6))
|
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(portRef DOB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))))
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(net mdout1_1_36
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(joined
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(portRef D1 (instanceRef mux_5))
|
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(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
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(net mdout1_0_36
|
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(joined
|
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(portRef D0 (instanceRef mux_5))
|
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(portRef DOB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))))
|
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(net mdout1_1_37
|
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(joined
|
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(portRef D1 (instanceRef mux_4))
|
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(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
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(net mdout1_0_37
|
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(joined
|
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(portRef D0 (instanceRef mux_4))
|
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(portRef DOB1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))))
|
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(net mdout1_1_38
|
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(joined
|
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(portRef D1 (instanceRef mux_3))
|
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(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
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(net mdout1_0_38
|
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(joined
|
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(portRef D0 (instanceRef mux_3))
|
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(portRef DOB2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))))
|
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(net mdout1_1_39
|
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(joined
|
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(portRef D1 (instanceRef mux_2))
|
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(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
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(net mdout1_0_39
|
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(joined
|
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(portRef D0 (instanceRef mux_2))
|
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(portRef DOB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))))
|
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(net mdout1_1_40
|
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(joined
|
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(portRef D1 (instanceRef mux_1))
|
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(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
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(net mdout1_0_40
|
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(joined
|
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(portRef D0 (instanceRef mux_1))
|
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(portRef DOB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))))
|
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(net raddr10_ff2
|
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(joined
|
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(portRef SD (instanceRef mux_0))
|
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(portRef Q (instanceRef FF_0))
|
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(portRef SD (instanceRef mux_41))
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(portRef SD (instanceRef mux_40))
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(portRef SD (instanceRef mux_39))
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(portRef SD (instanceRef mux_38))
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(portRef SD (instanceRef mux_37))
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(portRef SD (instanceRef mux_36))
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(portRef SD (instanceRef mux_35))
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(portRef SD (instanceRef mux_34))
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(portRef SD (instanceRef mux_33))
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(portRef SD (instanceRef mux_32))
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(portRef SD (instanceRef mux_31))
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(portRef SD (instanceRef mux_30))
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(portRef SD (instanceRef mux_29))
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(portRef SD (instanceRef mux_28))
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(portRef SD (instanceRef mux_27))
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(portRef SD (instanceRef mux_26))
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(portRef SD (instanceRef mux_25))
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(portRef SD (instanceRef mux_24))
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(portRef SD (instanceRef mux_23))
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(portRef SD (instanceRef mux_22))
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(portRef SD (instanceRef mux_21))
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(portRef SD (instanceRef mux_20))
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(portRef SD (instanceRef mux_19))
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(portRef SD (instanceRef mux_18))
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(portRef SD (instanceRef mux_17))
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(portRef SD (instanceRef mux_16))
|
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(portRef SD (instanceRef mux_15))
|
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(portRef SD (instanceRef mux_14))
|
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(portRef SD (instanceRef mux_13))
|
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(portRef SD (instanceRef mux_12))
|
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(portRef SD (instanceRef mux_11))
|
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(portRef SD (instanceRef mux_10))
|
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(portRef SD (instanceRef mux_9))
|
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(portRef SD (instanceRef mux_8))
|
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(portRef SD (instanceRef mux_7))
|
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(portRef SD (instanceRef mux_6))
|
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(portRef SD (instanceRef mux_5))
|
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(portRef SD (instanceRef mux_4))
|
|
(portRef SD (instanceRef mux_3))
|
|
(portRef SD (instanceRef mux_2))
|
|
(portRef SD (instanceRef mux_1))))
|
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(net mdout1_1_41
|
|
(joined
|
|
(portRef D1 (instanceRef mux_0))
|
|
(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
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(net mdout1_0_41
|
|
(joined
|
|
(portRef D0 (instanceRef mux_0))
|
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(portRef DOB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))))
|
|
(net dataout41
|
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(joined
|
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(portRef (member Q 0))
|
|
(portRef Z (instanceRef mux_0))))
|
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(net dataout40
|
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(joined
|
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(portRef (member Q 1))
|
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(portRef Z (instanceRef mux_1))))
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(net dataout39
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(joined
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(portRef (member Q 2))
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(portRef Z (instanceRef mux_2))))
|
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(net dataout38
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(joined
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(portRef (member Q 3))
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(portRef Z (instanceRef mux_3))))
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(net dataout37
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(joined
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(portRef (member Q 4))
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(portRef Z (instanceRef mux_4))))
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(net dataout36
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(portRef (member Q 5))
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(portRef Z (instanceRef mux_5))))
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(net dataout35
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(portRef Z (instanceRef mux_6))))
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(net dataout34
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(portRef Z (instanceRef mux_7))))
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(net dataout33
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(portRef Z (instanceRef mux_8))))
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(net dataout32
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(portRef Z (instanceRef mux_9))))
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(net dataout31
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(portRef Z (instanceRef mux_10))))
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(net dataout30
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(portRef (member Q 11))
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(portRef Z (instanceRef mux_11))))
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(net dataout29
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(joined
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(portRef (member Q 12))
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(portRef Z (instanceRef mux_12))))
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(net dataout28
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(joined
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(portRef Z (instanceRef mux_13))))
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(net dataout27
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(portRef Z (instanceRef mux_14))))
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(net dataout26
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(portRef Z (instanceRef mux_15))))
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(net dataout25
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(portRef Z (instanceRef mux_16))))
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(net dataout24
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(net dataout22
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(portRef Z (instanceRef mux_19))))
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(net dataout19
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|
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(net dataout0
|
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(joined
|
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(portRef (member Q 41))
|
|
(portRef Z (instanceRef mux_41))))
|
|
(net WrClockEn
|
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(joined
|
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(portRef WrClockEn)
|
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(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
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(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
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(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef OCEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef CEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net clk
|
|
(joined
|
|
(portRef WrClock)
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CLKA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net Reset
|
|
(joined
|
|
(portRef Reset)
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef RSTB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef RSTA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net RdClockEn
|
|
(joined
|
|
(portRef RdClockEn)
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef OCEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef CEB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef SP (instanceRef FF_1))
|
|
(portRef SP (instanceRef FF_0))))
|
|
(net rdclk
|
|
(joined
|
|
(portRef RdClock)
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CLKB (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef CK (instanceRef FF_1))
|
|
(portRef CK (instanceRef FF_0))))
|
|
(net wren
|
|
(joined
|
|
(portRef WE)
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef WEA (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net datain41
|
|
(joined
|
|
(portRef (member Data 0))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net datain40
|
|
(joined
|
|
(portRef (member Data 1))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net datain39
|
|
(joined
|
|
(portRef (member Data 2))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net datain38
|
|
(joined
|
|
(portRef (member Data 3))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net datain37
|
|
(joined
|
|
(portRef (member Data 4))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net datain36
|
|
(joined
|
|
(portRef (member Data 5))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net datain35
|
|
(joined
|
|
(portRef (member Data 6))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain34
|
|
(joined
|
|
(portRef (member Data 7))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain33
|
|
(joined
|
|
(portRef (member Data 8))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain32
|
|
(joined
|
|
(portRef (member Data 9))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain31
|
|
(joined
|
|
(portRef (member Data 10))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain30
|
|
(joined
|
|
(portRef (member Data 11))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain29
|
|
(joined
|
|
(portRef (member Data 12))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain28
|
|
(joined
|
|
(portRef (member Data 13))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain27
|
|
(joined
|
|
(portRef (member Data 14))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))))
|
|
(net datain26
|
|
(joined
|
|
(portRef (member Data 15))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain25
|
|
(joined
|
|
(portRef (member Data 16))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain24
|
|
(joined
|
|
(portRef (member Data 17))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain23
|
|
(joined
|
|
(portRef (member Data 18))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain22
|
|
(joined
|
|
(portRef (member Data 19))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain21
|
|
(joined
|
|
(portRef (member Data 20))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain20
|
|
(joined
|
|
(portRef (member Data 21))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain19
|
|
(joined
|
|
(portRef (member Data 22))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain18
|
|
(joined
|
|
(portRef (member Data 23))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))))
|
|
(net datain17
|
|
(joined
|
|
(portRef (member Data 24))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain16
|
|
(joined
|
|
(portRef (member Data 25))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain15
|
|
(joined
|
|
(portRef (member Data 26))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain14
|
|
(joined
|
|
(portRef (member Data 27))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain13
|
|
(joined
|
|
(portRef (member Data 28))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain12
|
|
(joined
|
|
(portRef (member Data 29))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain11
|
|
(joined
|
|
(portRef (member Data 30))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain10
|
|
(joined
|
|
(portRef (member Data 31))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain9
|
|
(joined
|
|
(portRef (member Data 32))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))))
|
|
(net datain8
|
|
(joined
|
|
(portRef (member Data 33))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain7
|
|
(joined
|
|
(portRef (member Data 34))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain6
|
|
(joined
|
|
(portRef (member Data 35))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain5
|
|
(joined
|
|
(portRef (member Data 36))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain4
|
|
(joined
|
|
(portRef (member Data 37))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain3
|
|
(joined
|
|
(portRef (member Data 38))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain2
|
|
(joined
|
|
(portRef (member Data 39))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA2 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain1
|
|
(joined
|
|
(portRef (member Data 40))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA1 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net datain0
|
|
(joined
|
|
(portRef (member Data 41))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef DIA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))))
|
|
(net raddr10
|
|
(joined
|
|
(portRef (member RdAddress 0))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CSB0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))
|
|
(portRef D (instanceRef FF_1))))
|
|
(net raddr9
|
|
(joined
|
|
(portRef (member RdAddress 1))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr8
|
|
(joined
|
|
(portRef (member RdAddress 2))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr7
|
|
(joined
|
|
(portRef (member RdAddress 3))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr6
|
|
(joined
|
|
(portRef (member RdAddress 4))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr5
|
|
(joined
|
|
(portRef (member RdAddress 5))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr4
|
|
(joined
|
|
(portRef (member RdAddress 6))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr3
|
|
(joined
|
|
(portRef (member RdAddress 7))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr2
|
|
(joined
|
|
(portRef (member RdAddress 8))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr1
|
|
(joined
|
|
(portRef (member RdAddress 9))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net raddr0
|
|
(joined
|
|
(portRef (member RdAddress 10))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADB3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr10
|
|
(joined
|
|
(portRef (member WrAddress 0))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef CSA0 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr9
|
|
(joined
|
|
(portRef (member WrAddress 1))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA12 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr8
|
|
(joined
|
|
(portRef (member WrAddress 2))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA11 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
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(net waddr7
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(joined
|
|
(portRef (member WrAddress 3))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
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(portRef ADA10 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
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(net waddr6
|
|
(joined
|
|
(portRef (member WrAddress 4))
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|
(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
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|
(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
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|
(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
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(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
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(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
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(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
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|
(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
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|
(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
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|
(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
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|
(portRef ADA9 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
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|
(net waddr5
|
|
(joined
|
|
(portRef (member WrAddress 5))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA8 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr4
|
|
(joined
|
|
(portRef (member WrAddress 6))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA7 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr3
|
|
(joined
|
|
(portRef (member WrAddress 7))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA6 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr2
|
|
(joined
|
|
(portRef (member WrAddress 8))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA5 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr1
|
|
(joined
|
|
(portRef (member WrAddress 9))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA4 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))
|
|
(net waddr0
|
|
(joined
|
|
(portRef (member WrAddress 10))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_0_9))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_1_8))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_2_7))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_3_6))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_0_4_5))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_0_4))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_1_3))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_2_2))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_3_1))
|
|
(portRef ADA3 (instanceRef pmi_ram_dpXbnonesadr4211204842112048p1395c895_1_4_0))))))))
|
|
(design pmi_ram_dpXbnonesadr4211204842112048p1395c895
|
|
(cellRef pmi_ram_dpXbnonesadr4211204842112048p1395c895
|
|
(libraryRef ORCLIB)))
|
|
)
|