[ START MERGED ] i_rst_n_c_i i_rst_n_c RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tu_0/reset_n_i RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/reset_rvl_n RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tu_1/reset_n_i RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/reset_rvl_n RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/jshift_d2.CN jtaghub16_jtck RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/jrstn_i jtaghub16_jrstn RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/reset_n_i RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/reset_rvl_n RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/genblk1.te_tt_dist_ram/dec0_wre3 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/tt_wr_en RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/reset_n_i RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/reset_rvl_n RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/genblk1.te_tt_dist_ram/dec0_wre3 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/tt_wr_en RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/jshift_d2.CN jtaghub16_jtck RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/jrstn_i jtaghub16_jrstn RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tcnt_0/reset_n_i RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/reset_rvl_n RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/r_w.CN jtaghub16_jtck RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/jrstn_i jtaghub16_jrstn RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/reset_n_i RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/reset_rvl_n RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/reset_n_i RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/reset_rvl_n RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/jtck_i jtaghub16_jtck RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/jrstn_i jtaghub16_jrstn xo2chub/cdn.CN jtaghub16_jtck xo2chub/jrstn_i jtaghub16_jrstn [ END MERGED ] [ START CLIPPED ] xo2chub/GND RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/popfeedthru_unused RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/genblk4.tr_mem/scuba_vlo RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/genblk4.tr_mem/scuba_vhi RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/ren_jtck RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/rd_dout_te[2] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/VCC RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/VCC RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/rd_dout_te_0[2] CPLD_Con_2/GND xo2chub/VCC xo2chub/bit_count_cry_0_COUT[3] xo2chub/rom_rd_addr_cry_0_S0[0] xo2chub/N_2 xo2chub/rom_rd_addr_s_0_S1[7] xo2chub/rom_rd_addr_s_0_COUT[7] xo2chub/jtdo2_int_prm_16_0_0_S1 xo2chub/jtdo2_int_prm_16_0_0_S0 xo2chub/N_3 xo2chub/er2_tdo[14] xo2chub/er2_tdo[15] xo2chub/jtdo2_int_prm_15_0_0_S1 xo2chub/jtdo2_int_prm_15_0_0_S0 xo2chub/er2_tdo[12] xo2chub/er2_tdo[13] xo2chub/jtdo2_int_prm_13_0_0_S1 xo2chub/jtdo2_int_prm_13_0_0_S0 xo2chub/er2_tdo[10] xo2chub/er2_tdo[11] xo2chub/jtdo2_int_prm_11_0_0_S1 xo2chub/jtdo2_int_prm_11_0_0_S0 xo2chub/er2_tdo[8] xo2chub/er2_tdo[9] xo2chub/jtdo2_int_prm_9_0_0_S1 xo2chub/jtdo2_int_prm_9_0_0_S0 xo2chub/er2_tdo[6] xo2chub/er2_tdo[7] xo2chub/jtdo2_int_prm_7_0_0_S1 xo2chub/jtdo2_int_prm_7_0_0_S0 xo2chub/er2_tdo[4] xo2chub/er2_tdo[5] xo2chub/jtdo2_int_prm_5_0_0_S1 xo2chub/jtdo2_int_prm_5_0_0_S0 xo2chub/er2_tdo[2] xo2chub/er2_tdo[3] xo2chub/jtdo2_int_prm_3_0_0_S1 xo2chub/jtdo2_int_prm_3_0_0_S0 xo2chub/er2_tdo[1] xo2chub/jtdo2_int_prm_1_0_0_S0 xo2chub/jtdo2_int_prm_1_0_0_COUT xo2chub/ip_enable[15] xo2chub/genblk7.un1_jtagf_u_1 xo2chub/genblk7.un1_jtagf_u xo2chub/tdoa xo2chub/tdia xo2chub/tmsa xo2chub/tcka xo2chub/cdn xo2chub/bit_count_cry_0_S0[0] xo2chub/N_1 GND VCC RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/VCC RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/GND RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/tm_wr_addr_cntr_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/N_1 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/tm_wr_addr_cntr_cry_0_COUT[9] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/tm_rd_addr_cntr_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/N_2 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/tm_rd_addr_cntr_cry_0_COUT[9] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/pre_trig_cntr_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/N_3 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/pre_trig_cntr_cry_0_COUT[9] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/post_trig_cntr_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/N_4 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/post_trig_cntr_cry_0_COUT[9] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/bit_cnt_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/N_1 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/bit_cnt_s_0_S1[5] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/bit_cnt_s_0_COUT[5] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/tr_dout_bit_cnt_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/N_2 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/tr_dout_bit_cnt_s_0_S1[5] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u/tr_dout_bit_cnt_s_0_COUT[5] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/VCC RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/GND RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/rd_dout_tcnt[4] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/te_precnt_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/N_1 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/te_precnt_s_0_S1[15] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/te_precnt_s_0_COUT[15] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/genblk1.te_tt_dist_ram/mem_0_0/DO2 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/genblk1.te_tt_dist_ram/mem_0_0/DO3 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/genblk1.te_tt_dist_ram/mem_0_0/DO2 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/genblk1.te_tt_dist_ram/mem_0_0/DO3 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/te_precnt_cry_0_S0[0] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/N_1 RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/te_precnt_s_0_S1[15] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/te_precnt_s_0_COUT[15] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/rd_dout_tu[3] RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/rd_dout_tu_0[3] CPLD_Con_2/un1_delay_cnt_1_s_15_0_S1 CPLD_Con_2/un1_delay_cnt_1_s_15_0_COUT CPLD_Con_2/un1_delay_cnt_1_cry_0_0_S1 CPLD_Con_2/un1_delay_cnt_1_cry_0_0_S0 CPLD_Con_2/N_10 [ END CLIPPED ] [ START DESIGN PREFS ] SCHEMATIC START ; # map: version Diamond (64-bit) 3.14.0.75.2 -- WARNING: Map write only section -- Tue May 26 15:49:45 2026 SYSCONFIG SDM_PORT=DISABLE SLAVE_SPI_PORT=DISABLE I2C_PORT=DISABLE MASTER_SPI_PORT=DISABLE COMPRESS_CONFIG=ON CONFIGURATION=CFG MY_ASSP=OFF ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF MCCLK_FREQ=2.08 JTAG_PORT=ENABLE ENABLE_TRANSFR=DISABLE SHAREDEBRINIT=DISABLE MUX_CONFIGURATION_PORTS=DISABLE BACKGROUND_RECONFIG=OFF INBUF=ON ; LOCATE COMP "i_sys_clk" SITE "B9" ; LOCATE COMP "o_PMU_OC_4[31]" SITE "A3" ; LOCATE COMP "o_PMU_OC_4[30]" SITE "B3" ; LOCATE COMP "o_PMU_OC_4[29]" SITE "A2" ; LOCATE COMP "o_PMU_OC_4[28]" SITE "C11" ; LOCATE COMP "o_PMU_OC_4[27]" SITE "D3" ; LOCATE COMP "o_PMU_OC_4[26]" SITE "E2" ; LOCATE COMP "o_PMU_OC_4[25]" SITE "D1" ; LOCATE COMP "o_PMU_OC_4[24]" SITE "E1" ; LOCATE COMP "o_PMU_OC_4[15]" SITE "E11" ; LOCATE COMP "o_PMU_OC_4[14]" SITE "G11" ; LOCATE COMP "o_PMU_OC_4[13]" SITE "C5" ; LOCATE COMP "o_PMU_OC_4[12]" SITE "C4" ; LOCATE COMP "o_PMU_OC_4[11]" SITE "F1" ; LOCATE COMP "o_PMU_OC_4[10]" SITE "G3" ; LOCATE COMP "o_PMU_OC_4[9]" SITE "G2" ; LOCATE COMP "o_PMU_OC_4[8]" SITE "G1" ; LOCATE COMP "o_PMU_OC_3[31]" SITE "D21" ; LOCATE COMP "o_PMU_OC_3[30]" SITE "E20" ; LOCATE COMP "o_PMU_OC_3[29]" SITE "E22" ; LOCATE COMP "o_PMU_OC_3[28]" SITE "G21" ; LOCATE COMP "o_PMU_OC_3[27]" SITE "C15" ; LOCATE COMP "o_PMU_OC_3[26]" SITE "B15" ; LOCATE COMP "o_PMU_OC_3[25]" SITE "B14" ; LOCATE COMP "o_PMU_OC_3[24]" SITE "B13" ; LOCATE COMP "o_PMU_OC_3[15]" SITE "B16" ; LOCATE COMP "o_PMU_OC_3[14]" SITE "A17" ; LOCATE COMP "o_PMU_OC_3[13]" SITE "C18" ; LOCATE COMP "o_PMU_OC_3[12]" SITE "B19" ; LOCATE COMP "o_PMU_OC_3[11]" SITE "A13" ; LOCATE COMP "o_PMU_OC_3[10]" SITE "B12" ; LOCATE COMP "o_PMU_OC_3[9]" SITE "A12" ; LOCATE COMP "o_PMU_OC_3[8]" SITE "A11" ; LOCATE COMP "o_PMU_OC_2[31]" SITE "D11" ; LOCATE COMP "o_PMU_OC_2[30]" SITE "E10" ; LOCATE COMP "o_PMU_OC_2[29]" SITE "E9" ; LOCATE COMP "o_PMU_OC_2[28]" SITE "E8" ; LOCATE COMP "o_PMU_OC_2[27]" SITE "T6" ; LOCATE COMP "o_PMU_OC_2[26]" SITE "W5" ; LOCATE COMP "o_PMU_OC_2[25]" SITE "U5" ; LOCATE COMP "o_PMU_OC_2[24]" SITE "T7" ; LOCATE COMP "o_PMU_OC_2[15]" SITE "H3" ; LOCATE COMP "o_PMU_OC_2[14]" SITE "H2" ; LOCATE COMP "o_PMU_OC_2[13]" SITE "H6" ; LOCATE COMP "o_PMU_OC_2[12]" SITE "H5" ; LOCATE COMP "o_PMU_OC_2[11]" SITE "B1" ; LOCATE COMP "o_PMU_OC_2[10]" SITE "C3" ; LOCATE COMP "o_PMU_OC_2[9]" SITE "C2" ; LOCATE COMP "o_PMU_OC_2[8]" SITE "C1" ; LOCATE COMP "o_PMU_OC_1[31]" SITE "U4" ; LOCATE COMP "o_PMU_OC_1[30]" SITE "P6" ; LOCATE COMP "o_PMU_OC_1[29]" SITE "T5" ; LOCATE COMP "o_PMU_OC_1[28]" SITE "R6" ; LOCATE COMP "o_PMU_OC_1[27]" SITE "M4" ; LOCATE COMP "o_PMU_OC_1[26]" SITE "P3" ; LOCATE COMP "o_PMU_OC_1[25]" SITE "D15" ; LOCATE COMP "o_PMU_OC_1[24]" SITE "N5" ; LOCATE COMP "o_PMU_OC_1[15]" SITE "E17" ; LOCATE COMP "o_PMU_OC_1[14]" SITE "D17" ; LOCATE COMP "o_PMU_OC_1[13]" SITE "F17" ; LOCATE COMP "o_PMU_OC_1[12]" SITE "C17" ; LOCATE COMP "o_PMU_OC_1[11]" SITE "F13" ; LOCATE COMP "o_PMU_OC_1[10]" SITE "C13" ; LOCATE COMP "o_PMU_OC_1[9]" SITE "G13" ; LOCATE COMP "o_PMU_OC_1[8]" SITE "D14" ; LOCATE COMP "o_RC_T[25]" SITE "AA13" ; LOCATE COMP "o_RC_T[24]" SITE "T13" ; LOCATE COMP "o_RC_T[23]" SITE "U15" ; LOCATE COMP "o_RC_T[22]" SITE "T15" ; LOCATE COMP "o_RC_T[21]" SITE "Y17" ; LOCATE COMP "o_RC_T[20]" SITE "W17" ; LOCATE COMP "o_RC_T[19]" SITE "W19" ; LOCATE COMP "o_RC_T[18]" SITE "AB20" ; LOCATE COMP "o_RC_T[17]" SITE "AA19" ; LOCATE COMP "o_RC_T[16]" SITE "Y18" ; LOCATE COMP "o_RC_T[15]" SITE "AB17" ; LOCATE COMP "o_RC_T[14]" SITE "V16" ; LOCATE COMP "o_RC_T[13]" SITE "V14" ; LOCATE COMP "o_RC_T[12]" SITE "V13" ; LOCATE COMP "o_RC_T[11]" SITE "Y12" ; LOCATE COMP "o_RC_T[10]" SITE "W12" ; LOCATE COMP "o_RC_T[9]" SITE "V12" ; LOCATE COMP "o_RC_T[8]" SITE "V8" ; LOCATE COMP "o_RC_T[7]" SITE "AB13" ; LOCATE COMP "o_RC_T[6]" SITE "AA12" ; LOCATE COMP "o_RC_T[5]" SITE "AB11" ; LOCATE COMP "o_RC_T[4]" SITE "AA11" ; LOCATE COMP "o_RC_T[3]" SITE "AA10" ; LOCATE COMP "o_RC_T[2]" SITE "AB10" ; LOCATE COMP "o_RC_T[1]" SITE "Y10" ; LOCATE COMP "o_RC_T[0]" SITE "AA8" ; LOCATE COMP "o_RC_S[15]" SITE "AA7" ; LOCATE COMP "o_RC_S[14]" SITE "AB7" ; LOCATE COMP "o_RC_S[13]" SITE "Y7" ; LOCATE COMP "o_RC_S[12]" SITE "Y6" ; LOCATE COMP "o_RC_S[11]" SITE "AB6" ; LOCATE COMP "o_RC_S[10]" SITE "AB5" ; LOCATE COMP "o_RC_S[9]" SITE "W6" ; LOCATE COMP "o_RC_S[8]" SITE "Y5" ; LOCATE COMP "o_RC_S[7]" SITE "AA4" ; LOCATE COMP "o_RC_S[6]" SITE "Y4" ; LOCATE COMP "o_RC_S[5]" SITE "AB3" ; LOCATE COMP "o_RC_S[4]" SITE "AA3" ; LOCATE COMP "o_RC_S[3]" SITE "Y3" ; LOCATE COMP "o_RC_S[2]" SITE "AB2" ; LOCATE COMP "o_RC_S[1]" SITE "W9" ; LOCATE COMP "o_RC_S[0]" SITE "T10" ; LOCATE COMP "o_RC_F[7]" SITE "U10" ; LOCATE COMP "o_RC_F[6]" SITE "W11" ; LOCATE COMP "o_RC_F[5]" SITE "V11" ; LOCATE COMP "o_RC_F[4]" SITE "U11" ; LOCATE COMP "o_RC_F[3]" SITE "T11" ; LOCATE COMP "o_RC_F[2]" SITE "T12" ; LOCATE COMP "o_RC_F[1]" SITE "U12" ; LOCATE COMP "o_RC_F[0]" SITE "U13" ; LOCATE COMP "o_err" SITE "AB16" ; LOCATE COMP "i_cs" SITE "Y15" ; LOCATE COMP "i_mosi" SITE "AB12" ; LOCATE COMP "i_sclk" SITE "AA16" ; LOCATE COMP "i_rst_n" SITE "Y14" ; USE PRIMARY NET "i_sys_clk_c" ; SCHEMATIC END ; [ END DESIGN PREFS ]