Update ignored items

This commit is contained in:
2026-05-28 10:41:25 +08:00
parent 8de946787c
commit da61ebe108
13 changed files with 1 additions and 859 deletions
+1
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@@ -19,6 +19,7 @@
*.hrr *.hrr
*.sym *.sym
pmi_* pmi_*
*._cml
# ---------- Synthesis (Synplify Pro / Synplify) ---------- # ---------- Synthesis (Synplify Pro / Synplify) ----------
synlog/ synlog/
-81
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----------------------------------------------------------------------
Report for cell RelayConTop.verilog
Register bits: 769 of 6864 (11%)
PIC Latch: 0
I/O cells: 187
Cell usage:
cell count Res Usage(%)
FD1P3AX 419 100.0
FD1P3AY 4 100.0
FD1P3IX 148 100.0
FD1P3JX 1 100.0
FD1S3AX 16 100.0
FD1S3IX 14 100.0
FD1S3JX 1 100.0
GSR 1 100.0
IB 5 100.0
IFS1P3IX 3 100.0
IFS1P3JX 1 100.0
INV 2 100.0
L6MUX21 72 100.0
OB 181 100.0
OBZ 1 100.0
OFS1P3DX 36 100.0
OFS1P3IX 126 100.0
ORCALUT4 747 100.0
PFUMX 104 100.0
PUR 1 100.0
VHI 4 100.0
VLO 4 100.0
SUB MODULES
BUS_Con 1 100.0
CPLD_Con 1 100.0
Reg_file 1 100.0
TOTAL 1894
----------------------------------------------------------------------
Report for cell CPLD_Con.netlist
Instance path: CPLD_Con_1
Cell usage:
cell count Res Usage(%)
FD1P3IX 18 12.2
FD1P3JX 1 100.0
FD1S3AX 12 75.0
FD1S3IX 5 35.7
INV 1 50.0
ORCALUT4 441 59.0
PFUMX 8 7.7
VHI 1 25.0
VLO 1 25.0
TOTAL 488
----------------------------------------------------------------------
Report for cell Reg_file.netlist
Instance path: CPLD_Reg_1
Cell usage:
cell count Res Usage(%)
FD1P3AX 419 100.0
FD1P3AY 4 100.0
FD1S3AX 2 12.5
L6MUX21 72 100.0
ORCALUT4 239 32.0
PFUMX 96 92.3
VHI 1 25.0
VLO 1 25.0
TOTAL 834
----------------------------------------------------------------------
Report for cell BUS_Con.netlist
Instance path: BUS_Con_1
Cell usage:
cell count Res Usage(%)
FD1P3IX 130 87.8
FD1S3AX 2 12.5
FD1S3IX 9 64.3
FD1S3JX 1 100.0
ORCALUT4 67 9.0
VHI 1 25.0
VLO 1 25.0
TOTAL 211
-10
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-v
10
-gt
-sethld
-sp 4
-sphld m
-40
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---------------------------------------------------
Report for cell RelayConTop
Instance path: RelayConTop
Cell usage:
cell count Res Usage(%)
SLIC 401.00 100.0
IOLGC 165.00 100.0
LUT4 747.00 100.0
IOREG 165 100.0
IOBUF 187 100.0
PFUREG 604 100.0
SUB MODULES
cell count SLC Usage(%)
Reg_file 1 53.8
CPLD_Con 1 31.0
BUS_Con 1 15.1
---------------------------------------------------
Report for cell CPLD_Con
Instance path: RelayConTop/CPLD_Con_1
Cell usage:
cell count Res Usage(%)
SLIC 124.30 31.0
LUT4 441.00 59.0
PFUREG 36 6.0
---------------------------------------------------
Report for cell Reg_file
Instance path: RelayConTop/CPLD_Reg_1
Cell usage:
cell count Res Usage(%)
SLIC 215.78 53.8
LUT4 239.00 32.0
PFUREG 425 70.4
---------------------------------------------------
Report for cell BUS_Con
Instance path: RelayConTop/BUS_Con_1
Cell usage:
cell count Res Usage(%)
SLIC 60.58 15.1
LUT4 67.00 9.0
PFUREG 142 23.5
-1
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@@ -1 +0,0 @@
-link -encrypt -top RelayConTop -osyn /home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD1/impl1/synwork/NewExtIns_CPLD1_impl1_comp.srs /home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD1/impl1/synwork/layer0.srs -jobname linker
-162
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----------------------------------------------------------------------
Report for cell RelayConTop.verilog
Register bits: 1275 of 6864 (19%)
PIC Latch: 0
I/O cells: 187
Cell usage:
cell count Res Usage(%)
CCU2D 59 100.0
FD1P3AX 427 100.0
FD1P3AY 3 100.0
FD1P3BX 33 100.0
FD1P3DX 347 100.0
FD1P3IX 175 100.0
FD1P3JX 1 100.0
FD1S3AX 20 100.0
FD1S3AY 1 100.0
FD1S3BX 4 100.0
FD1S3DX 87 100.0
FD1S3IX 33 100.0
FD1S3JX 1 100.0
GSR 1 100.0
IB 5 100.0
IFS1P3IX 2 100.0
IFS1P3JX 1 100.0
INV 18 100.0
L6MUX21 74 100.0
OB 181 100.0
OBZ 1 100.0
OFS1P3DX 4 100.0
OFS1P3IX 136 100.0
ORCALUT4 1290 100.0
PFUMX 104 100.0
PUR 1 100.0
VHI 15 100.0
VLO 15 100.0
jtagconn16 1 100.0
pmi_distributed_dpram_4s_2s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 2 100.0
pmi_ram_dp_Z4 1 100.0
SUB MODULES
BUS_Con_uniq_1 1 100.0
CPLD_Con_uniq_1 1 100.0
Reg_file_uniq_1 1 100.0
relaycontop_la0 1 100.0
relaycontop_la0_trig 1 100.0
reveal_coretop 1 100.0
TOTAL 3049
----------------------------------------------------------------------
Report for cell CPLD_Con_uniq_1.netlist
Instance path: CPLD_Con_2
Cell usage:
cell count Res Usage(%)
CCU2D 9 15.3
FD1P3IX 44 25.1
FD1P3JX 1 100.0
FD1S3AX 14 70.0
FD1S3IX 23 69.7
INV 1 5.6
ORCALUT4 339 26.3
VHI 1 6.7
VLO 1 6.7
TOTAL 433
----------------------------------------------------------------------
Report for cell Reg_file_uniq_1.netlist
Instance path: CPLD_Reg_2
Cell usage:
cell count Res Usage(%)
FD1P3AX 409 95.8
FD1P3AY 3 100.0
FD1S3AX 4 20.0
FD1S3AY 1 100.0
L6MUX21 72 97.3
ORCALUT4 250 19.4
PFUMX 97 93.3
VHI 1 6.7
VLO 1 6.7
TOTAL 838
----------------------------------------------------------------------
Report for cell BUS_Con_uniq_1.netlist
Instance path: BUS_Con_2
Cell usage:
cell count Res Usage(%)
FD1P3IX 131 74.9
FD1S3AX 2 10.0
FD1S3IX 10 30.3
FD1S3JX 1 100.0
ORCALUT4 96 7.4
VHI 1 6.7
VLO 1 6.7
TOTAL 242
----------------------------------------------------------------------
Report for cell reveal_coretop.verilog
Instance path: RelayConTop_reveal_coretop_instance
Cell usage:
cell count Res Usage(%)
CCU2D 50 84.7
FD1P3AX 18 4.2
FD1P3BX 33 100.0
FD1P3DX 347 100.0
FD1S3BX 4 100.0
FD1S3DX 87 100.0
INV 16 88.9
L6MUX21 2 2.7
ORCALUT4 605 46.9
PFUMX 7 6.7
VHI 11 73.3
VLO 11 73.3
jtagconn16 1 100.0
pmi_distributed_dpram_4s_2s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 2 100.0
pmi_ram_dp_Z4 1 100.0
SUB MODULES
relaycontop_la0 1 100.0
relaycontop_la0_trig 1 100.0
TOTAL 1197
----------------------------------------------------------------------
Report for cell relaycontop_la0.netlist
Instance path: RelayConTop_reveal_coretop_instance.relaycontop_la0_inst_0
Cell usage:
cell count Res Usage(%)
CCU2D 50 84.7
FD1P3AX 18 4.2
FD1P3BX 33 100.0
FD1P3DX 347 100.0
FD1S3BX 4 100.0
FD1S3DX 87 100.0
INV 16 88.9
L6MUX21 2 2.7
ORCALUT4 605 46.9
PFUMX 7 6.7
VHI 10 66.7
VLO 10 66.7
pmi_distributed_dpram_4s_2s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 2 100.0
pmi_ram_dp_Z4 1 100.0
SUB MODULES
relaycontop_la0_trig 1 100.0
TOTAL 1193
----------------------------------------------------------------------
Report for cell relaycontop_la0_trig.netlist
Instance path: RelayConTop_reveal_coretop_instance.relaycontop_la0_inst_0.trig_u
Cell usage:
cell count Res Usage(%)
CCU2D 18 30.5
FD1P3AX 16 3.7
FD1P3BX 1 3.0
FD1P3DX 61 17.6
FD1S3BX 4 100.0
FD1S3DX 32 36.8
INV 9 50.0
L6MUX21 2 2.7
ORCALUT4 193 15.0
PFUMX 7 6.7
VHI 7 46.7
VLO 7 46.7
pmi_distributed_dpram_4s_2s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 2 100.0
TOTAL 359
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-v
10
-gt
-sethld
-sp 4
-sphld m
-209
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---------------------------------------------------
Report for cell RelayConTop
Instance path: RelayConTop
Cell usage:
cell count Res Usage(%)
SLIC 760.00 100.0
IOLGC 142.00 100.0
LUT4 1344.00 100.0
DISTRAM 6.00 100.0
IOREG 142 100.0
IOBUF 187 100.0
PFUREG 1190 100.0
RIPPLE 76 100.0
EBR 10 100.0
SUB MODULES
cell count SLC Usage(%)
xo2chub 1 3.2
reveal_coretop 1 42.6
Reg_file_uniq_1 1 28.8
CPLD_Con_uniq_1 1 17.3
BUS_Con_uniq_1 1 8.1
---------------------------------------------------
Report for cell CPLD_Con_uniq_1
Instance path: RelayConTop/CPLD_Con_2
Cell usage:
cell count Res Usage(%)
SLIC 131.50 17.3
LUT4 340.00 25.3
PFUREG 82 6.9
RIPPLE 9 11.8
---------------------------------------------------
Report for cell Reg_file_uniq_1
Instance path: RelayConTop/CPLD_Reg_2
Cell usage:
cell count Res Usage(%)
SLIC 218.58 28.8
LUT4 250.00 18.6
PFUREG 417 35.0
---------------------------------------------------
Report for cell BUS_Con_uniq_1
Instance path: RelayConTop/BUS_Con_2
Cell usage:
cell count Res Usage(%)
SLIC 61.75 8.1
LUT4 96.00 7.1
PFUREG 144 12.1
---------------------------------------------------
Report for cell reveal_coretop
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance
Cell usage:
cell count Res Usage(%)
SLIC 323.42 42.6
LUT4 645.00 48.0
DISTRAM 4.00 66.7
PFUREG 495 41.6
RIPPLE 50 65.8
EBR 10 100.0
SUB MODULES
cell count SLC Usage(%)
relaycontop_la0 1 42.6
---------------------------------------------------
Report for cell relaycontop_la0
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0
Cell usage:
cell count Res Usage(%)
SLIC 323.42 42.6
LUT4 645.00 48.0
DISTRAM 4.00 66.7
PFUREG 495 41.6
RIPPLE 50 65.8
EBR 10 100.0
SUB MODULES
cell count SLC Usage(%)
rvl_tm_Z3 1 15.6
rvl_jtag_int_42s_2s_0s_0s_6s_42s_42s 1 14.4
relaycontop_la0_trig 1 12.5
---------------------------------------------------
Report for cell relaycontop_la0_trig
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u
Cell usage:
cell count Res Usage(%)
SLIC 95.13 12.5
LUT4 189.00 14.1
DISTRAM 4.00 66.7
PFUREG 118 9.9
RIPPLE 18 23.7
SUB MODULES
cell count SLC Usage(%)
rvl_tu_1s_0s_0s_0s_1s_2 1 0.8
rvl_tu_1s_0s_0s_0s_1s_1 1 0.8
rvl_tcnt_2s_3s_1_0s 1 1.3
rvl_te_Z1_0 1 4.0
rvl_te_Z1_1 1 4.8
rvl_decode_2s_2s 1 0.4
---------------------------------------------------
Report for cell rvl_decode_2s_2s
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/decode_u
Cell usage:
cell count Res Usage(%)
SLIC 3.10 0.4
LUT4 12.50 0.9
---------------------------------------------------
Report for cell rvl_tu_1s_0s_0s_0s_1s_2
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tu_0
Cell usage:
cell count Res Usage(%)
SLIC 6.08 0.8
LUT4 11.00 0.8
PFUREG 8 0.7
---------------------------------------------------
Report for cell rvl_tu_1s_0s_0s_0s_1s_1
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tu_1
Cell usage:
cell count Res Usage(%)
SLIC 6.18 0.8
LUT4 12.00 0.9
PFUREG 8 0.7
---------------------------------------------------
Report for cell rvl_te_Z1_1
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0
Cell usage:
cell count Res Usage(%)
SLIC 36.20 4.8
LUT4 69.50 5.2
DISTRAM 2.00 33.3
PFUREG 53 4.5
RIPPLE 9 11.8
SUB MODULES
cell count SLC Usage(%)
pmi_distributed_dpramXbnoner224pb08036b 1 0.3
---------------------------------------------------
Report for cell pmi_distributed_dpramXbnoner224pb08036b
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/genblk1.te_tt_dist_ram
Cell usage:
cell count Res Usage(%)
SLIC 2.25 0.3
LUT4 1.00 0.1
DISTRAM 2.00 33.3
PFUREG 2 0.2
---------------------------------------------------
Report for cell rvl_te_Z1_0
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1
Cell usage:
cell count Res Usage(%)
SLIC 30.33 4.0
LUT4 53.00 3.9
DISTRAM 2.00 33.3
PFUREG 36 3.0
RIPPLE 9 11.8
SUB MODULES
cell count SLC Usage(%)
pmi_distributed_dpramXbnoner224pb08036b_0 1 0.3
---------------------------------------------------
Report for cell pmi_distributed_dpramXbnoner224pb08036b_0
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/genblk1.te_tt_dist_ram
Cell usage:
cell count Res Usage(%)
SLIC 2.25 0.3
LUT4 1.00 0.1
DISTRAM 2.00 33.3
PFUREG 2 0.2
---------------------------------------------------
Report for cell rvl_tcnt_2s_3s_1_0s
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tcnt_0
Cell usage:
cell count Res Usage(%)
SLIC 9.73 1.3
LUT4 22.00 1.6
PFUREG 13 1.1
---------------------------------------------------
Report for cell rvl_jtag_int_42s_2s_0s_0s_6s_42s_42s
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u
Cell usage:
cell count Res Usage(%)
SLIC 109.27 14.4
LUT4 249.50 18.6
PFUREG 168 14.1
RIPPLE 8 10.5
---------------------------------------------------
Report for cell rvl_tm_Z3
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u
Cell usage:
cell count Res Usage(%)
SLIC 118.57 15.6
LUT4 205.00 15.3
PFUREG 209 17.6
RIPPLE 24 31.6
EBR 10 100.0
SUB MODULES
cell count SLC Usage(%)
pmi_ram_dpXbnonesadr4211204842112048p1395c895 1 1.4
---------------------------------------------------
Report for cell pmi_ram_dpXbnonesadr4211204842112048p1395c895
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/genblk4.tr_mem
Cell usage:
cell count Res Usage(%)
SLIC 11.00 1.4
LUT4 42.00 3.1
PFUREG 2 0.2
EBR 10 100.0
---------------------------------------------------
Report for cell xo2chub
Instance path: RelayConTop/xo2chub
Cell usage:
cell count Res Usage(%)
SLIC 24.25 3.2
LUT4 12.00 0.9
PFUREG 51 4.3
RIPPLE 17 22.4
-1
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@@ -1 +0,0 @@
-link -encrypt -top RelayConTop -osyn /home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD2/impl1/synwork/NewExtIns_CPLD2_impl1_comp.srs /home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD2/impl1/synwork/layer0.srs -jobname linker
-158
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@@ -1,158 +0,0 @@
----------------------------------------------------------------------
Report for cell RelayConTop.verilog
Register bits: 1206 of 6864 (18%)
PIC Latch: 0
I/O cells: 14
Cell usage:
cell count Res Usage(%)
CCU2D 41 100.0
FD1P3AX 424 100.0
FD1P3AY 2 100.0
FD1P3BX 32 100.0
FD1P3DX 437 100.0
FD1P3IX 133 100.0
FD1P3JX 1 100.0
FD1S3AX 6 100.0
FD1S3AY 1 100.0
FD1S3BX 3 100.0
FD1S3DX 140 100.0
FD1S3IX 16 100.0
FD1S3JX 1 100.0
GSR 1 100.0
IB 5 100.0
IFS1P3IX 3 100.0
IFS1P3JX 1 100.0
INV 13 100.0
L6MUX21 73 100.0
OB 8 100.0
OBZ 1 100.0
OFS1P3DX 2 100.0
OFS1P3JX 4 100.0
ORCALUT4 1035 100.0
PFUMX 102 100.0
PUR 1 100.0
VHI 13 100.0
VLO 13 100.0
jtagconn16 1 100.0
pmi_distributed_dpram_2s_1s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 1 100.0
pmi_ram_dp_Z4 1 100.0
SUB MODULES
BUS_Con_uniq_1 1 100.0
CPLD_Con_uniq_1 1 100.0
Reg_file_uniq_1 1 100.0
relaycontop_la0 1 100.0
relaycontop_la0_trig 1 100.0
reveal_coretop 1 100.0
TOTAL 2521
----------------------------------------------------------------------
Report for cell CPLD_Con_uniq_1.netlist
Instance path: CPLD_Con_3
Cell usage:
cell count Res Usage(%)
FD1P3IX 8 6.0
FD1P3JX 1 100.0
FD1S3IX 6 37.5
ORCALUT4 34 3.3
VHI 1 7.7
VLO 1 7.7
TOTAL 51
----------------------------------------------------------------------
Report for cell Reg_file_uniq_1.netlist
Instance path: CPLD_Reg_3
Cell usage:
cell count Res Usage(%)
FD1P3AX 406 95.8
FD1P3AY 2 100.0
FD1S3AX 4 66.7
FD1S3AY 1 100.0
L6MUX21 72 98.6
ORCALUT4 243 23.5
PFUMX 96 94.1
VHI 1 7.7
VLO 1 7.7
TOTAL 826
----------------------------------------------------------------------
Report for cell BUS_Con_uniq_1.netlist
Instance path: Bus_Con_3
Cell usage:
cell count Res Usage(%)
FD1P3IX 125 94.0
FD1S3AX 2 33.3
FD1S3IX 10 62.5
FD1S3JX 1 100.0
ORCALUT4 100 9.7
VHI 1 7.7
VLO 1 7.7
TOTAL 240
----------------------------------------------------------------------
Report for cell reveal_coretop.verilog
Instance path: RelayConTop_reveal_coretop_instance
Cell usage:
cell count Res Usage(%)
CCU2D 41 100.0
FD1P3AX 18 4.2
FD1P3BX 32 100.0
FD1P3DX 437 100.0
FD1S3BX 3 100.0
FD1S3DX 140 100.0
INV 12 92.3
L6MUX21 1 1.4
ORCALUT4 658 63.6
PFUMX 6 5.9
VHI 9 69.2
VLO 9 69.2
jtagconn16 1 100.0
pmi_distributed_dpram_2s_1s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 1 100.0
pmi_ram_dp_Z4 1 100.0
SUB MODULES
relaycontop_la0 1 100.0
relaycontop_la0_trig 1 100.0
TOTAL 1371
----------------------------------------------------------------------
Report for cell relaycontop_la0.netlist
Instance path: RelayConTop_reveal_coretop_instance.relaycontop_la0_inst_0
Cell usage:
cell count Res Usage(%)
CCU2D 41 100.0
FD1P3AX 18 4.2
FD1P3BX 32 100.0
FD1P3DX 437 100.0
FD1S3BX 3 100.0
FD1S3DX 140 100.0
INV 12 92.3
L6MUX21 1 1.4
ORCALUT4 658 63.6
PFUMX 6 5.9
VHI 8 61.5
VLO 8 61.5
pmi_distributed_dpram_2s_1s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 1 100.0
pmi_ram_dp_Z4 1 100.0
SUB MODULES
relaycontop_la0_trig 1 100.0
TOTAL 1367
----------------------------------------------------------------------
Report for cell relaycontop_la0_trig.netlist
Instance path: RelayConTop_reveal_coretop_instance.relaycontop_la0_inst_0.trig_u
Cell usage:
cell count Res Usage(%)
CCU2D 9 22.0
FD1P3AX 16 3.8
FD1P3DX 29 6.6
FD1S3BX 3 100.0
FD1S3DX 22 15.7
INV 5 38.5
L6MUX21 1 1.4
ORCALUT4 119 11.5
PFUMX 3 2.9
VHI 5 38.5
VLO 5 38.5
pmi_distributed_dpram_2s_1s_2s_reg_none_binary_XO2_pmi_distributed_dpram_Z2 1 100.0
TOTAL 218
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-v
10
-gt
-sethld
-sp 4
-sphld m
-176
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---------------------------------------------------
Report for cell RelayConTop
Instance path: RelayConTop
Cell usage:
cell count Res Usage(%)
SLIC 746.00 100.0
IOLGC 9.00 100.0
LUT4 1154.00 100.0
DISTRAM 3.00 100.0
IOREG 9 100.0
IOBUF 14 100.0
PFUREG 1252 100.0
RIPPLE 58 100.0
EBR 24 100.0
SUB MODULES
cell count SLC Usage(%)
xo2chub 1 4.5
reveal_coretop 1 56.7
Reg_file_uniq_1 1 28.6
CPLD_Con_uniq_1 1 1.8
BUS_Con_uniq_1 1 8.3
---------------------------------------------------
Report for cell CPLD_Con_uniq_1
Instance path: RelayConTop/CPLD_Con_3
Cell usage:
cell count Res Usage(%)
SLIC 13.42 1.8
LUT4 34.00 2.9
PFUREG 15 1.2
---------------------------------------------------
Report for cell Reg_file_uniq_1
Instance path: RelayConTop/CPLD_Reg_3
Cell usage:
cell count Res Usage(%)
SLIC 213.53 28.6
LUT4 243.00 21.1
PFUREG 413 33.0
---------------------------------------------------
Report for cell BUS_Con_uniq_1
Instance path: RelayConTop/Bus_Con_3
Cell usage:
cell count Res Usage(%)
SLIC 61.75 8.3
LUT4 100.00 8.7
PFUREG 138 11.0
---------------------------------------------------
Report for cell reveal_coretop
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance
Cell usage:
cell count Res Usage(%)
SLIC 423.22 56.7
LUT4 763.00 66.1
DISTRAM 2.00 66.7
PFUREG 634 50.6
RIPPLE 41 70.7
EBR 24 100.0
SUB MODULES
cell count SLC Usage(%)
relaycontop_la0 1 56.7
---------------------------------------------------
Report for cell relaycontop_la0
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0
Cell usage:
cell count Res Usage(%)
SLIC 423.22 56.7
LUT4 763.00 66.1
DISTRAM 2.00 66.7
PFUREG 634 50.6
RIPPLE 41 70.7
EBR 24 100.0
SUB MODULES
cell count SLC Usage(%)
rvl_tm_Z3 1 26.6
rvl_jtag_int_104s_1s_0s_0s_7s_104s_104s 1 21.3
relaycontop_la0_trig 1 8.7
---------------------------------------------------
Report for cell relaycontop_la0_trig
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u
Cell usage:
cell count Res Usage(%)
SLIC 65.10 8.7
LUT4 118.00 10.2
DISTRAM 2.00 66.7
PFUREG 72 5.8
RIPPLE 9 15.5
SUB MODULES
cell count SLC Usage(%)
rvl_tu_1s_0s_0s_0s_1s 1 1.3
rvl_te_Z1 1 5.6
rvl_tcnt_1s_3s_1_0s 1 1.4
rvl_decode_1s_1s 1 0.3
---------------------------------------------------
Report for cell rvl_decode_1s_1s
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/decode_u
Cell usage:
cell count Res Usage(%)
SLIC 2.23 0.3
LUT4 8.50 0.7
---------------------------------------------------
Report for cell rvl_tu_1s_0s_0s_0s_1s
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tu_0
Cell usage:
cell count Res Usage(%)
SLIC 9.62 1.3
LUT4 13.00 1.1
PFUREG 8 0.6
---------------------------------------------------
Report for cell rvl_te_Z1
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0
Cell usage:
cell count Res Usage(%)
SLIC 41.70 5.6
LUT4 65.50 5.7
DISTRAM 2.00 66.7
PFUREG 52 4.2
RIPPLE 9 15.5
SUB MODULES
cell count SLC Usage(%)
pmi_distributed_dpramXbnoner212pb07f9c9 1 0.3
---------------------------------------------------
Report for cell pmi_distributed_dpramXbnoner212pb07f9c9
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/genblk1.te_tt_dist_ram
Cell usage:
cell count Res Usage(%)
SLIC 2.50 0.3
LUT4 1.00 0.1
DISTRAM 2.00 66.7
PFUREG 2 0.2
---------------------------------------------------
Report for cell rvl_tcnt_1s_3s_1_0s
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tcnt_0
Cell usage:
cell count Res Usage(%)
SLIC 10.32 1.4
LUT4 27.00 2.3
PFUREG 12 1.0
---------------------------------------------------
Report for cell rvl_jtag_int_104s_1s_0s_0s_7s_104s_104s
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u
Cell usage:
cell count Res Usage(%)
SLIC 159.08 21.3
LUT4 373.50 32.4
PFUREG 229 18.3
RIPPLE 8 13.8
---------------------------------------------------
Report for cell rvl_tm_Z3
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u
Cell usage:
cell count Res Usage(%)
SLIC 198.58 26.6
LUT4 270.00 23.4
PFUREG 333 26.6
RIPPLE 24 41.4
EBR 24 100.0
SUB MODULES
cell count SLC Usage(%)
pmi_ram_dpXbnonesadr104112048104112048p13b9aa5b 1 3.6
---------------------------------------------------
Report for cell pmi_ram_dpXbnonesadr104112048104112048p13b9aa5b
Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/genblk4.tr_mem
Cell usage:
cell count Res Usage(%)
SLIC 26.50 3.6
LUT4 104.00 9.0
PFUREG 2 0.2
EBR 24 100.0
---------------------------------------------------
Report for cell xo2chub
Instance path: RelayConTop/xo2chub
Cell usage:
cell count Res Usage(%)
SLIC 33.50 4.5
LUT4 12.00 1.0
PFUREG 51 4.1
RIPPLE 17 29.3
-1
View File
@@ -1 +0,0 @@
-link -encrypt -top RelayConTop -osyn /home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD3/impl1/synwork/NewExtIns_CPLD3_impl1_comp.srs /home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD3/impl1/synwork/layer0.srs -jobname linker