yuysh/NewInstrCalBoard_CPLD
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Bug fixes

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yuysh
2026-06-09 14:58:30 +08:00
parent e19adb09f9
commit c447c6a592
20 changed files with 12463 additions and 12686 deletions
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CPLD2/CPLD_Con.v
+2 -2
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@@ -58,7 +58,7 @@ module CPLD_Con (
reg [15:0]delay_cnt;
//Shift Counter
wire [4:0]OC_Shifter1 = (i_DC_Con1[8:1] - 1) >> 3;; // Channel Number div 8
wire [4:0]OC_Shifter1 = (i_DC_Con1[8:1] - 1) >> 3; // Channel Number div 8
wire [4:0]OC_Shifter2 = (i_DC_Con2[8:1] - 1) >> 3; // Channel Number div 8
wire [4:0]OC_Shifter3 = (i_DC_Con3[8:1] - 1) >> 3; // Channel Number div 8
wire [4:0]OC_Shifter4 = (i_DC_Con4[8:1] - 1) >> 3; // Channel Number div 8
@@ -918,7 +918,7 @@ module CPLD_Con (
relay_l2 <= 16'b0000_0001_0000_0000;
end
else if (delay_cnt == 'd1000) begin
relay_l3 <= 32'b0000_0000_0000_0010_0000_0000_0000_0000;
relay_l3 <= 32'b0000_0000_0000_0001_0000_0000_0000_0000;
end
end
'd69: begin