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Bug fixes

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This commit is contained in:
yuysh
2026-06-09 14:58:30 +08:00
parent e19adb09f9
commit c447c6a592
20 changed files with 12463 additions and 12686 deletions
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CPLD2/CPLD_Con.v
+2 -2
View File
@@ -58,7 +58,7 @@ module CPLD_Con (
reg [15:0]delay_cnt;
//Shift Counter
wire [4:0]OC_Shifter1 = (i_DC_Con1[8:1] - 1) >> 3;; // Channel Number div 8
wire [4:0]OC_Shifter1 = (i_DC_Con1[8:1] - 1) >> 3; // Channel Number div 8
wire [4:0]OC_Shifter2 = (i_DC_Con2[8:1] - 1) >> 3; // Channel Number div 8
wire [4:0]OC_Shifter3 = (i_DC_Con3[8:1] - 1) >> 3; // Channel Number div 8
wire [4:0]OC_Shifter4 = (i_DC_Con4[8:1] - 1) >> 3; // Channel Number div 8
@@ -918,7 +918,7 @@ module CPLD_Con (
relay_l2 <= 16'b0000_0001_0000_0000;
end
else if (delay_cnt == 'd1000) begin
relay_l3 <= 32'b0000_0000_0000_0010_0000_0000_0000_0000;
relay_l3 <= 32'b0000_0000_0000_0001_0000_0000_0000_0000;
end
end
'd69: begin
CPLD2/NewExtIns_CPLD2.lpf
+2
View File
@@ -5,6 +5,7 @@ RVL_ALIAS "i_sys_clk" "i_sys_clk";
RVL_ALIAS "i_sys_clk" "i_sys_clk";
RVL_ALIAS "i_sys_clk" "i_sys_clk";
RVL_ALIAS "i_sys_clk" "i_sys_clk";
RVL_ALIAS "i_sys_clk" "i_sys_clk";
BLOCK RESETPATHS ;
BLOCK ASYNCPATHS ;
LOCATE COMP "i_sys_clk" SITE "B9" ;
@@ -322,3 +323,4 @@ LOCATE COMP "o_PMU_OC_4[30]" SITE "B3" ;
LOCATE COMP "o_PMU_OC_4[31]" SITE "A3" ;
USE PRIMARY NET "i_sys_clk_c" ;
IOBUF PORT "o_rvalid" IO_TYPE=LVCMOS33 ;
LOCATE COMP "o_miso" SITE "AA14" ;
CPLD2/debug.rvl
+106 -37
View File
@@ -1,7 +1,7 @@
<Project ModBy="Inserter" SigType="0" Name="C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/CPLD/CPLD2/debug.rvl" Date="2026-05-29">
<Project ModBy="Inserter" SigType="0" Name="C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/CPLD/CPLD2/debug.rvl" Date="2026-06-09">
<IP Version="1_6_042617"/>
<Design DesignEntry="Schematic/Verilog HDL" Synthesis="synplify" DeviceFamily="MachXO2" DesignName="NewExtIns_CPLD2"/>
<Core InsertDataset="0" Insert="1" Reveal_sig="695936542" Name="RelayConTop_LA0" ID="0">
<Core InsertDataset="0" Insert="1" Reveal_sig="697492332" Name="RelayConTop_LA0" ID="0">
<Setting>
<Clock SampleClk="i_sys_clk" SampleEnable="0" EnableClk="" EnableClk_Pri="0"/>
<TraceBuffer Implementation="0" BitTimeStamp="0" hasTimeStamp="0" IncTrigSig="0" BufferDepth="2048"/>
@@ -12,51 +12,120 @@
</Setting>
<Dataset Name="Base">
<Trace>
<Sig Type="SIG" Name="i_rst_n"/>
<Sig Type="SIG" Name="CPLD_Con_2/i_con_exec"/>
<Sig Type="SIG" Name="BUS_Con_2/err_flag"/>
<Sig Type="SIG" Name="CPLD_Con_2/err_flag"/>
<Sig Type="SIG" Name="CPLD_Reg_2/err_flag"/>
<Bus Name="o_PMU_OC_1">
<Sig Type="SIG" Name="o_PMU_OC_1:0"/>
<Sig Type="SIG" Name="o_PMU_OC_1:1"/>
<Sig Type="SIG" Name="o_PMU_OC_1:2"/>
<Sig Type="SIG" Name="o_PMU_OC_1:3"/>
<Sig Type="SIG" Name="o_PMU_OC_1:4"/>
<Sig Type="SIG" Name="o_PMU_OC_1:5"/>
<Sig Type="SIG" Name="o_PMU_OC_1:6"/>
<Sig Type="SIG" Name="o_PMU_OC_1:7"/>
<Sig Type="SIG" Name="o_PMU_OC_1:8"/>
<Sig Type="SIG" Name="o_PMU_OC_1:9"/>
<Sig Type="SIG" Name="o_PMU_OC_1:10"/>
<Sig Type="SIG" Name="o_PMU_OC_1:11"/>
<Sig Type="SIG" Name="o_PMU_OC_1:12"/>
<Sig Type="SIG" Name="o_PMU_OC_1:13"/>
<Sig Type="SIG" Name="o_PMU_OC_1:14"/>
<Sig Type="SIG" Name="o_PMU_OC_1:15"/>
<Sig Type="SIG" Name="o_PMU_OC_1:16"/>
<Sig Type="SIG" Name="o_PMU_OC_1:17"/>
<Sig Type="SIG" Name="o_PMU_OC_1:18"/>
<Sig Type="SIG" Name="o_PMU_OC_1:19"/>
<Sig Type="SIG" Name="o_PMU_OC_1:20"/>
<Sig Type="SIG" Name="o_PMU_OC_1:21"/>
<Sig Type="SIG" Name="o_PMU_OC_1:22"/>
<Sig Type="SIG" Name="o_PMU_OC_1:23"/>
<Sig Type="SIG" Name="o_PMU_OC_1:24"/>
<Sig Type="SIG" Name="o_PMU_OC_1:25"/>
<Sig Type="SIG" Name="o_PMU_OC_1:26"/>
<Sig Type="SIG" Name="o_PMU_OC_1:27"/>
<Sig Type="SIG" Name="o_PMU_OC_1:28"/>
<Sig Type="SIG" Name="o_PMU_OC_1:29"/>
<Sig Type="SIG" Name="o_PMU_OC_1:30"/>
<Sig Type="SIG" Name="o_PMU_OC_1:31"/>
<Bus Name="RC_F">
<Sig Type="SIG" Name="RC_F:0"/>
<Sig Type="SIG" Name="RC_F:1"/>
<Sig Type="SIG" Name="RC_F:2"/>
<Sig Type="SIG" Name="RC_F:3"/>
<Sig Type="SIG" Name="RC_F:4"/>
<Sig Type="SIG" Name="RC_F:5"/>
<Sig Type="SIG" Name="RC_F:6"/>
<Sig Type="SIG" Name="RC_F:7"/>
</Bus>
<Bus Name="RC_S">
<Sig Type="SIG" Name="RC_S:0"/>
<Sig Type="SIG" Name="RC_S:1"/>
<Sig Type="SIG" Name="RC_S:2"/>
<Sig Type="SIG" Name="RC_S:3"/>
<Sig Type="SIG" Name="RC_S:4"/>
<Sig Type="SIG" Name="RC_S:5"/>
<Sig Type="SIG" Name="RC_S:6"/>
<Sig Type="SIG" Name="RC_S:7"/>
<Sig Type="SIG" Name="RC_S:8"/>
<Sig Type="SIG" Name="RC_S:9"/>
<Sig Type="SIG" Name="RC_S:10"/>
<Sig Type="SIG" Name="RC_S:11"/>
<Sig Type="SIG" Name="RC_S:12"/>
<Sig Type="SIG" Name="RC_S:13"/>
<Sig Type="SIG" Name="RC_S:14"/>
<Sig Type="SIG" Name="RC_S:15"/>
</Bus>
<Bus Name="RC_T">
<Sig Type="SIG" Name="RC_T:0"/>
<Sig Type="SIG" Name="RC_T:1"/>
<Sig Type="SIG" Name="RC_T:2"/>
<Sig Type="SIG" Name="RC_T:3"/>
<Sig Type="SIG" Name="RC_T:4"/>
<Sig Type="SIG" Name="RC_T:5"/>
<Sig Type="SIG" Name="RC_T:6"/>
<Sig Type="SIG" Name="RC_T:7"/>
<Sig Type="SIG" Name="RC_T:8"/>
<Sig Type="SIG" Name="RC_T:9"/>
<Sig Type="SIG" Name="RC_T:10"/>
<Sig Type="SIG" Name="RC_T:11"/>
<Sig Type="SIG" Name="RC_T:12"/>
<Sig Type="SIG" Name="RC_T:13"/>
<Sig Type="SIG" Name="RC_T:14"/>
<Sig Type="SIG" Name="RC_T:15"/>
<Sig Type="SIG" Name="RC_T:16"/>
<Sig Type="SIG" Name="RC_T:17"/>
<Sig Type="SIG" Name="RC_T:18"/>
<Sig Type="SIG" Name="RC_T:19"/>
<Sig Type="SIG" Name="RC_T:20"/>
<Sig Type="SIG" Name="RC_T:21"/>
<Sig Type="SIG" Name="RC_T:22"/>
<Sig Type="SIG" Name="RC_T:23"/>
<Sig Type="SIG" Name="RC_T:24"/>
<Sig Type="SIG" Name="RC_T:25"/>
<Sig Type="SIG" Name="RC_T:26"/>
<Sig Type="SIG" Name="RC_T:27"/>
<Sig Type="SIG" Name="RC_T:28"/>
<Sig Type="SIG" Name="RC_T:29"/>
<Sig Type="SIG" Name="RC_T:30"/>
<Sig Type="SIG" Name="RC_T:31"/>
</Bus>
<Bus Name="CPLD_Con_2/OC_Shifter3">
<Sig Type="SIG" Name="CPLD_Con_2/OC_Shifter3:0"/>
<Sig Type="SIG" Name="CPLD_Con_2/OC_Shifter3:1"/>
<Sig Type="SIG" Name="CPLD_Con_2/OC_Shifter3:2"/>
<Sig Type="SIG" Name="CPLD_Con_2/OC_Shifter3:3"/>
<Sig Type="SIG" Name="CPLD_Con_2/OC_Shifter3:4"/>
</Bus>
<Bus Name="o_PMU_OC_3">
<Sig Type="SIG" Name="o_PMU_OC_3:0"/>
<Sig Type="SIG" Name="o_PMU_OC_3:1"/>
<Sig Type="SIG" Name="o_PMU_OC_3:2"/>
<Sig Type="SIG" Name="o_PMU_OC_3:3"/>
<Sig Type="SIG" Name="o_PMU_OC_3:4"/>
<Sig Type="SIG" Name="o_PMU_OC_3:5"/>
<Sig Type="SIG" Name="o_PMU_OC_3:6"/>
<Sig Type="SIG" Name="o_PMU_OC_3:7"/>
<Sig Type="SIG" Name="o_PMU_OC_3:8"/>
<Sig Type="SIG" Name="o_PMU_OC_3:9"/>
<Sig Type="SIG" Name="o_PMU_OC_3:10"/>
<Sig Type="SIG" Name="o_PMU_OC_3:11"/>
<Sig Type="SIG" Name="o_PMU_OC_3:12"/>
<Sig Type="SIG" Name="o_PMU_OC_3:13"/>
<Sig Type="SIG" Name="o_PMU_OC_3:14"/>
<Sig Type="SIG" Name="o_PMU_OC_3:15"/>
<Sig Type="SIG" Name="o_PMU_OC_3:16"/>
<Sig Type="SIG" Name="o_PMU_OC_3:17"/>
<Sig Type="SIG" Name="o_PMU_OC_3:18"/>
<Sig Type="SIG" Name="o_PMU_OC_3:19"/>
<Sig Type="SIG" Name="o_PMU_OC_3:20"/>
<Sig Type="SIG" Name="o_PMU_OC_3:21"/>
<Sig Type="SIG" Name="o_PMU_OC_3:22"/>
<Sig Type="SIG" Name="o_PMU_OC_3:23"/>
<Sig Type="SIG" Name="o_PMU_OC_3:24"/>
<Sig Type="SIG" Name="o_PMU_OC_3:25"/>
<Sig Type="SIG" Name="o_PMU_OC_3:26"/>
<Sig Type="SIG" Name="o_PMU_OC_3:27"/>
<Sig Type="SIG" Name="o_PMU_OC_3:28"/>
<Sig Type="SIG" Name="o_PMU_OC_3:29"/>
<Sig Type="SIG" Name="o_PMU_OC_3:30"/>
<Sig Type="SIG" Name="o_PMU_OC_3:31"/>
</Bus>
</Trace>
<Trigger>
<TU Serialbits="0" Type="0" ID="1" Sig="i_cs,"/>
<TU Serialbits="0" Type="0" ID="2" Sig="i_rst_n,"/>
<TU Serialbits="0" Type="0" ID="3" Sig="con_exec,"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="1" Resource="0"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="2" Resource="0"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="3" Resource="0"/>
</Trigger>
</Dataset>
</Core>
CPLD2/debug.rvs
+126 -57
View File
@@ -1,58 +1,127 @@
<Project ModBy="Analyzer" Name="C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/CPLD/CPLD2/debug.rvs" Date="2026-05-29">
<Core Name="RelayConTop_LA0">
<Setting>
<Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
<Event EventCnt="0" CntEnableRun="0"/>
<TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
</Setting>
<Dataset Name="Base">
<Trace>
<Sig Name="i_rst_n"/>
<Sig Name="CPLD_Con_2/i_con_exec"/>
<Sig Name="BUS_Con_2/err_flag"/>
<Sig Name="CPLD_Con_2/err_flag"/>
<Sig Name="CPLD_Reg_2/err_flag"/>
<Bus Name="o_PMU_OC_1" Radix="0">
<Sig Name="o_PMU_OC_1:0"/>
<Sig Name="o_PMU_OC_1:1"/>
<Sig Name="o_PMU_OC_1:2"/>
<Sig Name="o_PMU_OC_1:3"/>
<Sig Name="o_PMU_OC_1:4"/>
<Sig Name="o_PMU_OC_1:5"/>
<Sig Name="o_PMU_OC_1:6"/>
<Sig Name="o_PMU_OC_1:7"/>
<Sig Name="o_PMU_OC_1:8"/>
<Sig Name="o_PMU_OC_1:9"/>
<Sig Name="o_PMU_OC_1:10"/>
<Sig Name="o_PMU_OC_1:11"/>
<Sig Name="o_PMU_OC_1:12"/>
<Sig Name="o_PMU_OC_1:13"/>
<Sig Name="o_PMU_OC_1:14"/>
<Sig Name="o_PMU_OC_1:15"/>
<Sig Name="o_PMU_OC_1:16"/>
<Sig Name="o_PMU_OC_1:17"/>
<Sig Name="o_PMU_OC_1:18"/>
<Sig Name="o_PMU_OC_1:19"/>
<Sig Name="o_PMU_OC_1:20"/>
<Sig Name="o_PMU_OC_1:21"/>
<Sig Name="o_PMU_OC_1:22"/>
<Sig Name="o_PMU_OC_1:23"/>
<Sig Name="o_PMU_OC_1:24"/>
<Sig Name="o_PMU_OC_1:25"/>
<Sig Name="o_PMU_OC_1:26"/>
<Sig Name="o_PMU_OC_1:27"/>
<Sig Name="o_PMU_OC_1:28"/>
<Sig Name="o_PMU_OC_1:29"/>
<Sig Name="o_PMU_OC_1:30"/>
<Sig Name="o_PMU_OC_1:31"/>
</Bus>
</Trace>
<Trigger>
<TU Operator="7" Name="TU1" ID="1" Value="0" Radix="0"/>
<TU Operator="7" Name="TU2" ID="2" Value="0" Radix="0"/>
<TE Enable="1" Expression="TU1" Name="TE1" ID="1"/>
<TE Enable="1" Expression="TU2" Name="TE2" ID="2"/>
</Trigger>
</Dataset>
</Core>
<Project ModBy="Inserter" Name="C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/CPLD/CPLD2/debug.rvl" Date="2026-06-09">
<Core Name="RelayConTop_LA0">
<Setting>
<Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
<Event EventCnt="0" CntEnableRun="0"/>
<TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
</Setting>
<Dataset Name="Base">
<Trace>
<Sig Name="BUS_Con_2/err_flag"/>
<Sig Name="CPLD_Con_2/err_flag"/>
<Sig Name="CPLD_Reg_2/err_flag"/>
<Bus Name="RC_F" Radix="0">
<Sig Name="RC_F:0"/>
<Sig Name="RC_F:1"/>
<Sig Name="RC_F:2"/>
<Sig Name="RC_F:3"/>
<Sig Name="RC_F:4"/>
<Sig Name="RC_F:5"/>
<Sig Name="RC_F:6"/>
<Sig Name="RC_F:7"/>
</Bus>
<Bus Name="RC_S" Radix="0">
<Sig Name="RC_S:0"/>
<Sig Name="RC_S:1"/>
<Sig Name="RC_S:2"/>
<Sig Name="RC_S:3"/>
<Sig Name="RC_S:4"/>
<Sig Name="RC_S:5"/>
<Sig Name="RC_S:6"/>
<Sig Name="RC_S:7"/>
<Sig Name="RC_S:8"/>
<Sig Name="RC_S:9"/>
<Sig Name="RC_S:10"/>
<Sig Name="RC_S:11"/>
<Sig Name="RC_S:12"/>
<Sig Name="RC_S:13"/>
<Sig Name="RC_S:14"/>
<Sig Name="RC_S:15"/>
</Bus>
<Bus Name="RC_T" Radix="0">
<Sig Name="RC_T:0"/>
<Sig Name="RC_T:1"/>
<Sig Name="RC_T:2"/>
<Sig Name="RC_T:3"/>
<Sig Name="RC_T:4"/>
<Sig Name="RC_T:5"/>
<Sig Name="RC_T:6"/>
<Sig Name="RC_T:7"/>
<Sig Name="RC_T:8"/>
<Sig Name="RC_T:9"/>
<Sig Name="RC_T:10"/>
<Sig Name="RC_T:11"/>
<Sig Name="RC_T:12"/>
<Sig Name="RC_T:13"/>
<Sig Name="RC_T:14"/>
<Sig Name="RC_T:15"/>
<Sig Name="RC_T:16"/>
<Sig Name="RC_T:17"/>
<Sig Name="RC_T:18"/>
<Sig Name="RC_T:19"/>
<Sig Name="RC_T:20"/>
<Sig Name="RC_T:21"/>
<Sig Name="RC_T:22"/>
<Sig Name="RC_T:23"/>
<Sig Name="RC_T:24"/>
<Sig Name="RC_T:25"/>
<Sig Name="RC_T:26"/>
<Sig Name="RC_T:27"/>
<Sig Name="RC_T:28"/>
<Sig Name="RC_T:29"/>
<Sig Name="RC_T:30"/>
<Sig Name="RC_T:31"/>
</Bus>
<Bus Name="CPLD_Con_2/OC_Shifter3" Radix="0">
<Sig Name="CPLD_Con_2/OC_Shifter3:0"/>
<Sig Name="CPLD_Con_2/OC_Shifter3:1"/>
<Sig Name="CPLD_Con_2/OC_Shifter3:2"/>
<Sig Name="CPLD_Con_2/OC_Shifter3:3"/>
<Sig Name="CPLD_Con_2/OC_Shifter3:4"/>
</Bus>
<Bus Name="o_PMU_OC_3" Radix="0">
<Sig Name="o_PMU_OC_3:0"/>
<Sig Name="o_PMU_OC_3:1"/>
<Sig Name="o_PMU_OC_3:2"/>
<Sig Name="o_PMU_OC_3:3"/>
<Sig Name="o_PMU_OC_3:4"/>
<Sig Name="o_PMU_OC_3:5"/>
<Sig Name="o_PMU_OC_3:6"/>
<Sig Name="o_PMU_OC_3:7"/>
<Sig Name="o_PMU_OC_3:8"/>
<Sig Name="o_PMU_OC_3:9"/>
<Sig Name="o_PMU_OC_3:10"/>
<Sig Name="o_PMU_OC_3:11"/>
<Sig Name="o_PMU_OC_3:12"/>
<Sig Name="o_PMU_OC_3:13"/>
<Sig Name="o_PMU_OC_3:14"/>
<Sig Name="o_PMU_OC_3:15"/>
<Sig Name="o_PMU_OC_3:16"/>
<Sig Name="o_PMU_OC_3:17"/>
<Sig Name="o_PMU_OC_3:18"/>
<Sig Name="o_PMU_OC_3:19"/>
<Sig Name="o_PMU_OC_3:20"/>
<Sig Name="o_PMU_OC_3:21"/>
<Sig Name="o_PMU_OC_3:22"/>
<Sig Name="o_PMU_OC_3:23"/>
<Sig Name="o_PMU_OC_3:24"/>
<Sig Name="o_PMU_OC_3:25"/>
<Sig Name="o_PMU_OC_3:26"/>
<Sig Name="o_PMU_OC_3:27"/>
<Sig Name="o_PMU_OC_3:28"/>
<Sig Name="o_PMU_OC_3:29"/>
<Sig Name="o_PMU_OC_3:30"/>
<Sig Name="o_PMU_OC_3:31"/>
</Bus>
</Trace>
<Trigger>
<TU Operator="7" Name="TU1" ID="1" Value="0" Radix="0"/>
<TU Operator="7" Name="TU2" ID="2" Value="0" Radix="0"/>
<TU Operator="6" Name="TU3" ID="3" Value="0" Radix="0"/>
<TE Enable="1" Expression="TU1" Name="TE1" ID="1"/>
<TE Enable="1" Expression="TU2" Name="TE2" ID="2"/>
<TE Enable="1" Expression="TU3" Name="TE3" ID="3"/>
</Trigger>
</Dataset>
</Core>
</Project>
CPLD2/impl1/NewExtIns_CPLD2_impl1.bit
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CPLD2/impl1/NewExtIns_CPLD2_impl1.jed
+3732 -3732
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CPLD2/untitled.svf
+38 -301
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