Add debug.rvs
This commit is contained in:
Jeremy Shen
@@ -98,7 +98,6 @@ reportview.xml
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*.tcr
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*.tcr
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# ---------- Reveal debug workspace (re-generatable) ----------
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# ---------- Reveal debug workspace (re-generatable) ----------
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debug.rvs
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reveal_workspace/
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reveal_workspace/
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*.rvp
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*.rvp
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+149
@@ -0,0 +1,149 @@
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<Project ModBy="Inserter" Name="/home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD1/debug.rvl" Date="2026-05-26">
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<Core Name="RelayConTop_LA0">
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<Setting>
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<Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
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<Event EventCnt="0" CntEnableRun="0"/>
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<TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
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</Setting>
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<Dataset Name="Base">
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<Trace>
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<Sig Name="BUS_Con_1/i_cs"/>
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<Sig Name="BUS_Con_1/i_mosi"/>
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<Sig Name="BUS_Con_1/i_sclk"/>
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<Bus Name="o_DMM_EN" Radix="0">
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<Sig Name="o_DMM_EN:0"/>
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<Sig Name="o_DMM_EN:1"/>
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<Sig Name="o_DMM_EN:2"/>
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<Sig Name="o_DMM_EN:3"/>
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<Sig Name="o_DMM_EN:4"/>
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<Sig Name="o_DMM_EN:5"/>
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<Sig Name="o_DMM_EN:6"/>
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<Sig Name="o_DMM_EN:7"/>
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<Sig Name="o_DMM_EN:8"/>
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<Sig Name="o_DMM_EN:9"/>
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<Sig Name="o_DMM_EN:10"/>
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<Sig Name="o_DMM_EN:11"/>
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<Sig Name="o_DMM_EN:12"/>
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<Sig Name="o_DMM_EN:13"/>
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<Sig Name="o_DMM_EN:14"/>
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<Sig Name="o_DMM_EN:15"/>
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</Bus>
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<Sig Name="o_IO_RC1"/>
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<Sig Name="BUS_Con_1/err_flag"/>
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<Sig Name="CPLD_Con_1/err_flag"/>
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<Sig Name="CPLD_Reg_1/err_flag"/>
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<Sig Name="CPLD_Con_1/i_con_exec"/>
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<Bus Name="CPLD_Con_1/i_DC_Con1" Radix="0">
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<Sig Name="CPLD_Con_1/i_DC_Con1:0"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:1"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:2"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:3"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:4"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:5"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:6"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:7"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:8"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:9"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:10"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:11"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:12"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:13"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:14"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:15"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:16"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:17"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:18"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:19"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:20"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:21"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:22"/>
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<Sig Name="CPLD_Con_1/i_DC_Con1:23"/>
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</Bus>
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<Bus Name="CPLD_Con_1/i_DC_Con2" Radix="0">
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<Sig Name="CPLD_Con_1/i_DC_Con2:0"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:1"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:2"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:3"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:4"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:5"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:6"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:7"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:8"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:9"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:10"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:11"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:12"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:13"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:14"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:15"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:16"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:17"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:18"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:19"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:20"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:21"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:22"/>
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<Sig Name="CPLD_Con_1/i_DC_Con2:23"/>
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</Bus>
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<Bus Name="CPLD_Con_1/i_DC_Con3" Radix="0">
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<Sig Name="CPLD_Con_1/i_DC_Con3:0"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:1"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:2"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:3"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:4"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:5"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:6"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:7"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:8"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:9"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:10"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:11"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:12"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:13"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:14"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:15"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:16"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:17"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:18"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:19"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:20"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:21"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:22"/>
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<Sig Name="CPLD_Con_1/i_DC_Con3:23"/>
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</Bus>
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<Bus Name="CPLD_Con_1/i_DC_Con4" Radix="0">
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<Sig Name="CPLD_Con_1/i_DC_Con4:0"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:1"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:2"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:3"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:4"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:5"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:6"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:7"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:8"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:9"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:10"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:11"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:12"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:13"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:14"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:15"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:16"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:17"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:18"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:19"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:20"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:21"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:22"/>
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<Sig Name="CPLD_Con_1/i_DC_Con4:23"/>
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</Bus>
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</Trace>
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<Trigger>
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<TU Operator="7" Name="TU1" ID="1" Value="0" Radix="0"/>
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<TU Operator="6" Name="TU2" ID="2" Value="0" Radix="0"/>
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<TE Enable="1" Expression="TU1" Name="TE1" ID="1"/>
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<TE Enable="1" Expression="TU2" Name="TE2" ID="2"/>
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</Trigger>
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</Dataset>
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</Core>
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</Project>
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@@ -0,0 +1,63 @@
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<Project ModBy="Inserter" Name="/home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD2/debug.rvl" Date="2026-05-26">
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<Core Name="RelayConTop_LA0">
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<Setting>
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<Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
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<Event EventCnt="0" CntEnableRun="0"/>
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<TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
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</Setting>
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<Dataset Name="Base">
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<Trace>
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<Sig Name="i_rst_n"/>
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<Sig Name="BUS_Con_2/i_cs"/>
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<Sig Name="BUS_Con_2/i_sclk"/>
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<Sig Name="BUS_Con_2/i_mosi"/>
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<Sig Name="BUS_Con_2/i_reg_busy"/>
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<Sig Name="CPLD_Reg_2/o_exec"/>
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<Bus Name="RC_T" Radix="0">
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<Sig Name="RC_T:0"/>
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<Sig Name="RC_T:1"/>
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<Sig Name="RC_T:2"/>
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<Sig Name="RC_T:3"/>
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<Sig Name="RC_T:4"/>
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<Sig Name="RC_T:5"/>
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<Sig Name="RC_T:6"/>
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<Sig Name="RC_T:7"/>
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<Sig Name="RC_T:8"/>
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<Sig Name="RC_T:9"/>
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<Sig Name="RC_T:10"/>
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<Sig Name="RC_T:11"/>
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<Sig Name="RC_T:12"/>
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<Sig Name="RC_T:13"/>
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<Sig Name="RC_T:14"/>
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<Sig Name="RC_T:15"/>
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<Sig Name="RC_T:16"/>
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<Sig Name="RC_T:17"/>
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<Sig Name="RC_T:18"/>
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<Sig Name="RC_T:19"/>
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<Sig Name="RC_T:20"/>
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<Sig Name="RC_T:21"/>
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<Sig Name="RC_T:22"/>
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<Sig Name="RC_T:23"/>
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<Sig Name="RC_T:24"/>
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<Sig Name="RC_T:25"/>
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<Sig Name="RC_T:26"/>
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<Sig Name="RC_T:27"/>
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<Sig Name="RC_T:28"/>
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<Sig Name="RC_T:29"/>
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<Sig Name="RC_T:30"/>
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<Sig Name="RC_T:31"/>
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</Bus>
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<Sig Name="BUS_Con_2/err_flag"/>
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<Sig Name="CPLD_Con_2/err_flag"/>
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<Sig Name="CPLD_Reg_2/err_flag"/>
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<Sig Name="CPLD_Con_2/i_con_exec"/>
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</Trace>
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<Trigger>
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<TU Operator="7" Name="TU1" ID="1" Value="0" Radix="0"/>
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<TU Operator="6" Name="TU2" ID="2" Value="0" Radix="0"/>
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<TE Enable="1" Expression="TU1" Name="TE1" ID="1"/>
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<TE Enable="1" Expression="TU2" Name="TE2" ID="2"/>
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</Trigger>
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</Dataset>
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</Core>
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</Project>
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+129
@@ -0,0 +1,129 @@
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<Project ModBy="Inserter" Name="/home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD3/debug.rvl" Date="2026-05-26">
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<Core Name="RelayConTop_LA0">
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<Setting>
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<Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
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<Event EventCnt="0" CntEnableRun="0"/>
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<TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
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</Setting>
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<Dataset Name="Base">
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<Trace>
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<Sig Name="Bus_Con_3/i_sclk"/>
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<Sig Name="i_rst_n"/>
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<Sig Name="Bus_Con_3/i_cs"/>
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<Sig Name="Bus_Con_3/i_mosi"/>
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<Sig Name="Bus_Con_3/err_flag"/>
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<Sig Name="CPLD_Con_3/err_flag"/>
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<Sig Name="CPLD_Reg_3/err_flag"/>
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<Sig Name="CPLD_Con_3/i_con_exec"/>
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<Bus Name="CPLD_Con_3/i_DC_Con1" Radix="0">
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<Sig Name="CPLD_Con_3/i_DC_Con1:0"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:1"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:2"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:3"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:4"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:5"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:6"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:7"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:8"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:9"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:10"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:11"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:12"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:13"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:14"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:15"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:16"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:17"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:18"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con1:19"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con1:20"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:21"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:22"/>
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<Sig Name="CPLD_Con_3/i_DC_Con1:23"/>
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</Bus>
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<Bus Name="CPLD_Con_3/i_DC_Con2" Radix="0">
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<Sig Name="CPLD_Con_3/i_DC_Con2:0"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:1"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:2"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:3"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:4"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:5"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:6"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:7"/>
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||||||
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<Sig Name="CPLD_Con_3/i_DC_Con2:8"/>
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||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:9"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:10"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:11"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:12"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:13"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:14"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:15"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:16"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:17"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:18"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:19"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:20"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:21"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:22"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con2:23"/>
|
||||||
|
</Bus>
|
||||||
|
<Bus Name="CPLD_Con_3/i_DC_Con3" Radix="0">
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:0"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:1"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:2"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:3"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:4"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:5"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:6"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:7"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:8"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:9"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:10"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:11"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:12"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:13"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:14"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:15"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:16"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:17"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:18"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:19"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:20"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:21"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:22"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con3:23"/>
|
||||||
|
</Bus>
|
||||||
|
<Bus Name="CPLD_Con_3/i_DC_Con4" Radix="0">
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:0"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:1"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:2"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:3"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:4"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:5"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:6"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:7"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:8"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:9"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:10"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:11"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:12"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:13"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:14"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:15"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:16"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:17"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:18"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:19"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:20"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:21"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:22"/>
|
||||||
|
<Sig Name="CPLD_Con_3/i_DC_Con4:23"/>
|
||||||
|
</Bus>
|
||||||
|
</Trace>
|
||||||
|
<Trigger>
|
||||||
|
<TU Operator="6" Name="TU1" ID="1" Value="0" Radix="0"/>
|
||||||
|
<TE Enable="1" Expression="TU1" Name="TE1" ID="1"/>
|
||||||
|
</Trigger>
|
||||||
|
</Dataset>
|
||||||
|
</Core>
|
||||||
|
</Project>
|
||||||
Reference in New Issue
Block a user