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Add debug.rvs

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This commit is contained in:
Jeremy Shen
2026-05-28 09:31:03 +08:00
parent 0d6272e7c9
commit 9ae77f3dbf
4 changed files with 341 additions and 1 deletions
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CPLD1/debug.rvs
+149
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<Project ModBy="Inserter" Name="/home/ly0kos/work/prj/New_CalBoard/2.FW/CPLD1/debug.rvl" Date="2026-05-26">
<Core Name="RelayConTop_LA0">
<Setting>
<Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
<Event EventCnt="0" CntEnableRun="0"/>
<TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
</Setting>
<Dataset Name="Base">
<Trace>
<Sig Name="BUS_Con_1/i_cs"/>
<Sig Name="BUS_Con_1/i_mosi"/>
<Sig Name="BUS_Con_1/i_sclk"/>
<Bus Name="o_DMM_EN" Radix="0">
<Sig Name="o_DMM_EN:0"/>
<Sig Name="o_DMM_EN:1"/>
<Sig Name="o_DMM_EN:2"/>
<Sig Name="o_DMM_EN:3"/>
<Sig Name="o_DMM_EN:4"/>
<Sig Name="o_DMM_EN:5"/>
<Sig Name="o_DMM_EN:6"/>
<Sig Name="o_DMM_EN:7"/>
<Sig Name="o_DMM_EN:8"/>
<Sig Name="o_DMM_EN:9"/>
<Sig Name="o_DMM_EN:10"/>
<Sig Name="o_DMM_EN:11"/>
<Sig Name="o_DMM_EN:12"/>
<Sig Name="o_DMM_EN:13"/>
<Sig Name="o_DMM_EN:14"/>
<Sig Name="o_DMM_EN:15"/>
</Bus>
<Sig Name="o_IO_RC1"/>
<Sig Name="BUS_Con_1/err_flag"/>
<Sig Name="CPLD_Con_1/err_flag"/>
<Sig Name="CPLD_Reg_1/err_flag"/>
<Sig Name="CPLD_Con_1/i_con_exec"/>
<Bus Name="CPLD_Con_1/i_DC_Con1" Radix="0">
<Sig Name="CPLD_Con_1/i_DC_Con1:0"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:1"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:2"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:3"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:4"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:5"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:6"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:7"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:8"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:9"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:10"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:11"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:12"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:13"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:14"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:15"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:16"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:17"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:18"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:19"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:20"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:21"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:22"/>
<Sig Name="CPLD_Con_1/i_DC_Con1:23"/>
</Bus>
<Bus Name="CPLD_Con_1/i_DC_Con2" Radix="0">
<Sig Name="CPLD_Con_1/i_DC_Con2:0"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:1"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:2"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:3"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:4"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:5"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:6"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:7"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:8"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:9"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:10"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:11"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:12"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:13"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:14"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:15"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:16"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:17"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:18"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:19"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:20"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:21"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:22"/>
<Sig Name="CPLD_Con_1/i_DC_Con2:23"/>
</Bus>
<Bus Name="CPLD_Con_1/i_DC_Con3" Radix="0">
<Sig Name="CPLD_Con_1/i_DC_Con3:0"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:1"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:2"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:3"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:4"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:5"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:6"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:7"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:8"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:9"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:10"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:11"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:12"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:13"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:14"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:15"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:16"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:17"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:18"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:19"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:20"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:21"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:22"/>
<Sig Name="CPLD_Con_1/i_DC_Con3:23"/>
</Bus>
<Bus Name="CPLD_Con_1/i_DC_Con4" Radix="0">
<Sig Name="CPLD_Con_1/i_DC_Con4:0"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:1"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:2"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:3"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:4"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:5"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:6"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:7"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:8"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:9"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:10"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:11"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:12"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:13"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:14"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:15"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:16"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:17"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:18"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:19"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:20"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:21"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:22"/>
<Sig Name="CPLD_Con_1/i_DC_Con4:23"/>
</Bus>
</Trace>
<Trigger>
<TU Operator="7" Name="TU1" ID="1" Value="0" Radix="0"/>
<TU Operator="6" Name="TU2" ID="2" Value="0" Radix="0"/>
<TE Enable="1" Expression="TU1" Name="TE1" ID="1"/>
<TE Enable="1" Expression="TU2" Name="TE2" ID="2"/>
</Trigger>
</Dataset>
</Core>
</Project>