Bug fixes for all CPLDs

This commit is contained in:
2026-05-29 18:31:27 +08:00
parent b3eef70c28
commit 54a64ec222
23 changed files with 16564 additions and 15078 deletions
+4 -4
View File
@@ -19,9 +19,9 @@
<BScanLen>1</BScanLen>
<BScanVal>0</BScanVal>
</Bypass>
<File>D:/WORK/ManLin/Verify/FPGA/Lattice/NewExtIns/CPLD2/impl1/NewExtIns_CPLD2_impl1.jed</File>
<FileTime>01/20/26 16:01:30</FileTime>
<JedecChecksum>0x566E</JedecChecksum>
<File>C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/CPLD/CPLD2/impl1/NewExtIns_CPLD2_impl1.jed</File>
<FileTime>05/29/26 18:26:36</FileTime>
<JedecChecksum>0x41B0</JedecChecksum>
<Operation>FLASH Erase,Program,Verify</Operation>
<Option>
<SVFVendor>JTAG STANDARD</SVFVendor>
@@ -47,6 +47,6 @@
<CableOptions>
<CableName>USB</CableName>
<PortAdd>EzUSB-0</PortAdd>
<USBID>\\?\usb#vid_1134&amp;amp;pid_8001#9&amp;amp;2fe42d87&amp;amp;0&amp;amp;2#</USBID>
<USBID>\\?\usb#vid_1134&amp;amp;pid_8001#6&amp;amp;ca080be&amp;amp;0&amp;amp;3#</USBID>
</CableOptions>
</ispXCF>