Update gitignore again
This commit is contained in:
Jeremy Shen
@@ -0,0 +1,209 @@
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---------------------------------------------------
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Report for cell RelayConTop
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Instance path: RelayConTop
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Cell usage:
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cell count Res Usage(%)
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SLIC 760.00 100.0
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IOLGC 142.00 100.0
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LUT4 1344.00 100.0
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DISTRAM 6.00 100.0
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IOREG 142 100.0
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IOBUF 187 100.0
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PFUREG 1190 100.0
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RIPPLE 76 100.0
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EBR 10 100.0
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SUB MODULES
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cell count SLC Usage(%)
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xo2chub 1 3.2
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reveal_coretop 1 42.6
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Reg_file_uniq_1 1 28.8
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CPLD_Con_uniq_1 1 17.3
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BUS_Con_uniq_1 1 8.1
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---------------------------------------------------
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Report for cell CPLD_Con_uniq_1
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Instance path: RelayConTop/CPLD_Con_2
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Cell usage:
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cell count Res Usage(%)
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SLIC 131.50 17.3
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LUT4 340.00 25.3
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PFUREG 82 6.9
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RIPPLE 9 11.8
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---------------------------------------------------
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Report for cell Reg_file_uniq_1
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Instance path: RelayConTop/CPLD_Reg_2
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Cell usage:
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cell count Res Usage(%)
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SLIC 218.58 28.8
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LUT4 250.00 18.6
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PFUREG 417 35.0
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---------------------------------------------------
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Report for cell BUS_Con_uniq_1
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Instance path: RelayConTop/BUS_Con_2
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Cell usage:
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cell count Res Usage(%)
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SLIC 61.75 8.1
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LUT4 96.00 7.1
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PFUREG 144 12.1
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---------------------------------------------------
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Report for cell reveal_coretop
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance
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Cell usage:
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cell count Res Usage(%)
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SLIC 323.42 42.6
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LUT4 645.00 48.0
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DISTRAM 4.00 66.7
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PFUREG 495 41.6
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RIPPLE 50 65.8
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EBR 10 100.0
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SUB MODULES
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cell count SLC Usage(%)
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relaycontop_la0 1 42.6
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---------------------------------------------------
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Report for cell relaycontop_la0
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0
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Cell usage:
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cell count Res Usage(%)
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SLIC 323.42 42.6
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LUT4 645.00 48.0
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DISTRAM 4.00 66.7
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PFUREG 495 41.6
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RIPPLE 50 65.8
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EBR 10 100.0
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SUB MODULES
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cell count SLC Usage(%)
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rvl_tm_Z3 1 15.6
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rvl_jtag_int_42s_2s_0s_0s_6s_42s_42s 1 14.4
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relaycontop_la0_trig 1 12.5
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---------------------------------------------------
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Report for cell relaycontop_la0_trig
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u
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Cell usage:
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cell count Res Usage(%)
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SLIC 95.13 12.5
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LUT4 189.00 14.1
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DISTRAM 4.00 66.7
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PFUREG 118 9.9
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RIPPLE 18 23.7
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SUB MODULES
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cell count SLC Usage(%)
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rvl_tu_1s_0s_0s_0s_1s_2 1 0.8
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rvl_tu_1s_0s_0s_0s_1s_1 1 0.8
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rvl_tcnt_2s_3s_1_0s 1 1.3
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rvl_te_Z1_0 1 4.0
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rvl_te_Z1_1 1 4.8
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rvl_decode_2s_2s 1 0.4
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---------------------------------------------------
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Report for cell rvl_decode_2s_2s
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/decode_u
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Cell usage:
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cell count Res Usage(%)
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SLIC 3.10 0.4
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LUT4 12.50 0.9
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---------------------------------------------------
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Report for cell rvl_tu_1s_0s_0s_0s_1s_2
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tu_0
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Cell usage:
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cell count Res Usage(%)
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SLIC 6.08 0.8
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LUT4 11.00 0.8
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PFUREG 8 0.7
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---------------------------------------------------
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Report for cell rvl_tu_1s_0s_0s_0s_1s_1
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tu_1
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Cell usage:
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cell count Res Usage(%)
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SLIC 6.18 0.8
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LUT4 12.00 0.9
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PFUREG 8 0.7
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---------------------------------------------------
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Report for cell rvl_te_Z1_1
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0
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Cell usage:
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cell count Res Usage(%)
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SLIC 36.20 4.8
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LUT4 69.50 5.2
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DISTRAM 2.00 33.3
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PFUREG 53 4.5
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RIPPLE 9 11.8
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SUB MODULES
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cell count SLC Usage(%)
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pmi_distributed_dpramXbnoner224pb08036b 1 0.3
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---------------------------------------------------
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Report for cell pmi_distributed_dpramXbnoner224pb08036b
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_0/genblk1.te_tt_dist_ram
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Cell usage:
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cell count Res Usage(%)
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SLIC 2.25 0.3
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LUT4 1.00 0.1
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DISTRAM 2.00 33.3
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PFUREG 2 0.2
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---------------------------------------------------
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Report for cell rvl_te_Z1_0
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1
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Cell usage:
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cell count Res Usage(%)
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SLIC 30.33 4.0
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LUT4 53.00 3.9
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DISTRAM 2.00 33.3
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PFUREG 36 3.0
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RIPPLE 9 11.8
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SUB MODULES
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cell count SLC Usage(%)
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pmi_distributed_dpramXbnoner224pb08036b_0 1 0.3
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---------------------------------------------------
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Report for cell pmi_distributed_dpramXbnoner224pb08036b_0
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/te_1/genblk1.te_tt_dist_ram
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Cell usage:
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cell count Res Usage(%)
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SLIC 2.25 0.3
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LUT4 1.00 0.1
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DISTRAM 2.00 33.3
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PFUREG 2 0.2
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---------------------------------------------------
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Report for cell rvl_tcnt_2s_3s_1_0s
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/trig_u/tcnt_0
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Cell usage:
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cell count Res Usage(%)
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SLIC 9.73 1.3
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LUT4 22.00 1.6
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PFUREG 13 1.1
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---------------------------------------------------
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Report for cell rvl_jtag_int_42s_2s_0s_0s_6s_42s_42s
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/jtag_int_u
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Cell usage:
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cell count Res Usage(%)
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SLIC 109.27 14.4
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LUT4 249.50 18.6
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PFUREG 168 14.1
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RIPPLE 8 10.5
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---------------------------------------------------
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Report for cell rvl_tm_Z3
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u
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Cell usage:
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cell count Res Usage(%)
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SLIC 118.57 15.6
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LUT4 205.00 15.3
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PFUREG 209 17.6
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RIPPLE 24 31.6
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EBR 10 100.0
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SUB MODULES
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cell count SLC Usage(%)
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pmi_ram_dpXbnonesadr4211204842112048p1395c895 1 1.4
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---------------------------------------------------
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Report for cell pmi_ram_dpXbnonesadr4211204842112048p1395c895
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Instance path: RelayConTop/RelayConTop_reveal_coretop_instance/relaycontop_la0_inst_0/tm_u/genblk4.tr_mem
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Cell usage:
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cell count Res Usage(%)
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SLIC 11.00 1.4
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LUT4 42.00 3.1
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PFUREG 2 0.2
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EBR 10 100.0
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---------------------------------------------------
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Report for cell xo2chub
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Instance path: RelayConTop/xo2chub
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Cell usage:
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cell count Res Usage(%)
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SLIC 24.25 3.2
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LUT4 12.00 0.9
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PFUREG 51 4.3
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RIPPLE 17 22.4
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