# This file is automatically generated.
# It contains project source information necessary for synthesis and implementation.

# IP: /home/ly0kos/work/prj/New_CalBoard/2.FW/NewExtInst_Debug/NewExtInst_Debug.srcs/sources_1/bd/NewExtInst_TOP/ip/NewExtInst_TOP_processing_system7_0_0/NewExtInst_TOP_processing_system7_0_0.xci
# IP: The module: 'NewExtInst_TOP_processing_system7_0_0' is the root of the design. Do not add the DONT_TOUCH constraint.

# XDC: /home/ly0kos/work/prj/New_CalBoard/2.FW/NewExtInst_Debug/NewExtInst_Debug.gen/sources_1/bd/NewExtInst_TOP/ip/NewExtInst_TOP_processing_system7_0_0/NewExtInst_TOP_processing_system7_0_0.xdc
# XDC: The top module name and the constraint reference have the same name: 'NewExtInst_TOP_processing_system7_0_0'. Do not add the DONT_TOUCH constraint.
set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet

# IP: /home/ly0kos/work/prj/New_CalBoard/2.FW/NewExtInst_Debug/NewExtInst_Debug.srcs/sources_1/bd/NewExtInst_TOP/ip/NewExtInst_TOP_processing_system7_0_0/NewExtInst_TOP_processing_system7_0_0.xci
# IP: The module: 'NewExtInst_TOP_processing_system7_0_0' is the root of the design. Do not add the DONT_TOUCH constraint.

# XDC: /home/ly0kos/work/prj/New_CalBoard/2.FW/NewExtInst_Debug/NewExtInst_Debug.gen/sources_1/bd/NewExtInst_TOP/ip/NewExtInst_TOP_processing_system7_0_0/NewExtInst_TOP_processing_system7_0_0.xdc
# XDC: The top module name and the constraint reference have the same name: 'NewExtInst_TOP_processing_system7_0_0'. Do not add the DONT_TOUCH constraint.
#dup# set_property KEEP_HIERARCHY SOFT [get_cells inst -quiet] -quiet
