{
    "graphjs": {
        "version": "1.0",
        "keys": [
            {
                "abrv": "VH",
                "name": "vert_hid",
                "type": "int",
                "for": "node"
            },
            {
                "abrv": "VM",
                "name": "vert_name",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "VT",
                "name": "vert_type",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "BA",
                "name": "base_addr",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "HA",
                "name": "high_addr",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "BP",
                "name": "base_param",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "HP",
                "name": "high_param",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "MA",
                "name": "master_addrspace",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "MX",
                "name": "master_instance",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "MI",
                "name": "master_interface",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "MS",
                "name": "master_segment",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "MV",
                "name": "master_vlnv",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "SX",
                "name": "slave_instance",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "SI",
                "name": "slave_interface",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "MM",
                "name": "slave_memmap",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "SS",
                "name": "slave_segment",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "SV",
                "name": "slave_vlnv",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "TM",
                "name": "memory_type",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "TU",
                "name": "usage_type",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "LT",
                "name": "lock_type",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "BT",
                "name": "boot_type",
                "type": "string",
                "for": "node"
            },
            {
                "abrv": "EH",
                "name": "edge_hid",
                "type": "int",
                "for": "edge"
            }
        ],
        "vertice_type_order": [
            {
                "abrv": "BC",
                "desc": "Block Container"
            },
            {
                "abrv": "PR",
                "desc": "Parital Reference"
            },
            {
                "abrv": "VR",
                "desc": "Variant"
            },
            {
                "abrv": "PM",
                "desc": "Variant Permutations"
            },
            {
                "abrv": "CX",
                "desc": "Boundary Connection"
            },
            {
                "abrv": "AC",
                "desc": "Assignment Coordinate"
            },
            {
                "abrv": "ACE",
                "desc": "Excluded Assign Coordinate"
            },
            {
                "abrv": "APX",
                "desc": "Boundary Aperture"
            },
            {
                "abrv": "CIP",
                "desc": "High level Processing System"
            }
        ],
        "vertices": {
            "V0": {
                "VM": "NewExtInst_TOP",
                "VT": "BC"
            },
            "V1": {
                "VH": "2",
                "VM": "NewExtInst_TOP",
                "VT": "VR"
            },
            "V2": {
                "VH": "2",
                "VT": "PM",
                "TU": "active"
            },
            "V3": {
                "VT": "AC",
                "BA": "0x43C00000",
                "HA": "0x43C0FFFF",
                "BP": "C_S00_AXI_BASEADDR",
                "HP": "C_S00_AXI_HIGHADDR",
                "MA": "Data",
                "MX": "/processing_system7_0",
                "MI": "M_AXI_GP0",
                "MS": "SEG_SPI_Con_0_S00_AXI_reg",
                "MV": "xilinx.com:ip:processing_system7:5.5",
                "SX": "/SPI_Con_0",
                "SI": "S00_AXI",
                "SS": "S00_AXI_reg",
                "SV": "xilinx.com:user:SPI_Con:1.0",
                "TM": "both",
                "TU": "register"
            },
            "V4": {
                "VT": "AC",
                "BA": "0x43C10000",
                "HA": "0x43C1FFFF",
                "BP": "C_S00_AXI_BASEADDR",
                "HP": "C_S00_AXI_HIGHADDR",
                "MA": "Data",
                "MX": "/processing_system7_0",
                "MI": "M_AXI_GP0",
                "MS": "SEG_SPI_Con_1_S00_AXI_reg",
                "MV": "xilinx.com:ip:processing_system7:5.5",
                "SX": "/SPI_Con_1",
                "SI": "S00_AXI",
                "SS": "S00_AXI_reg",
                "SV": "xilinx.com:user:SPI_Con:1.0",
                "TM": "both",
                "TU": "register"
            },
            "V5": {
                "VT": "AC",
                "BA": "0x43C20000",
                "HA": "0x43C2FFFF",
                "BP": "C_S00_AXI_BASEADDR",
                "HP": "C_S00_AXI_HIGHADDR",
                "MA": "Data",
                "MX": "/processing_system7_0",
                "MI": "M_AXI_GP0",
                "MS": "SEG_SPI_Con_2_S00_AXI_reg",
                "MV": "xilinx.com:ip:processing_system7:5.5",
                "SX": "/SPI_Con_2",
                "SI": "S00_AXI",
                "SS": "S00_AXI_reg",
                "SV": "xilinx.com:user:SPI_Con:1.0",
                "TM": "both",
                "TU": "register"
            }
        },
        "edges": [
            {
                "src": "V0",
                "trg": "V1"
            },
            {
                "src": "V1",
                "trg": "V2"
            },
            {
                "src": "V3",
                "trg": "V2",
                "EH": "2"
            },
            {
                "src": "V4",
                "trg": "V2",
                "EH": "2"
            },
            {
                "src": "V5",
                "trg": "V2",
                "EH": "2"
            }
        ]
    }
}
