diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000..cee4243 --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,3 @@ +{ + "iis.configDir": "" +} \ No newline at end of file diff --git a/NewExtInst_Zynq_Net/.project b/NewExtInst_Zynq_Net/.project index 8d4539d..df5a039 100644 --- a/NewExtInst_Zynq_Net/.project +++ b/NewExtInst_Zynq_Net/.project @@ -3,7 +3,7 @@ NewExtInst_Zynq_Net Created by Vitis v2023.2 - NewExtInst_bsp + NewExtInst_BSP diff --git a/NewExtInst_Zynq_Net/Debug/NewExtInst_Zynq_Net.elf b/NewExtInst_Zynq_Net/Debug/NewExtInst_Zynq_Net.elf index 2fe859a..28d529d 100755 Binary files a/NewExtInst_Zynq_Net/Debug/NewExtInst_Zynq_Net.elf and b/NewExtInst_Zynq_Net/Debug/NewExtInst_Zynq_Net.elf differ diff --git a/NewExtInst_Zynq_Net/NewExtInst_Zynq_Net.prj b/NewExtInst_Zynq_Net/NewExtInst_Zynq_Net.prj index 2c2426e..9ac483b 100644 --- a/NewExtInst_Zynq_Net/NewExtInst_Zynq_Net.prj +++ b/NewExtInst_Zynq_Net/NewExtInst_Zynq_Net.prj @@ -1,5 +1,5 @@ - + diff --git a/NewExtInst_Zynq_Net/src/CPLD_Con.c b/NewExtInst_Zynq_Net/src/CPLD_Con.c index 2376afe..ced6884 100644 --- a/NewExtInst_Zynq_Net/src/CPLD_Con.c +++ b/NewExtInst_Zynq_Net/src/CPLD_Con.c @@ -1,5 +1,142 @@ #include "CPLD_Con.h" +int CPLD_Checkin() +{ + int iStatus = -255; + u32 ureg_data = 0x0; + u8 uCPLD_Count = 3; + + xil_printf("[I] Start CPLD Check In...\r\n"); + xil_printf("[-]\t Checking CPLD #1\r\n"); + //Read CPLD IDENT Reg + iStatus = CPLD_Read(0x1,0x0,&ureg_data); + if (iStatus != XST_SUCCESS) + { + xil_printf("[E] CPLD #1 Communication Failed!\r\n"); + uCPLD_Count -= 1; + } + else + { + if (ureg_data == 0x0) + { + xil_printf("[E] CPLD #1 Not present! Or SPI communication Failed!\r\n"); + uCPLD_Count -= 1; + } + else + { + if ((ureg_data & 0x200000) != 0x200000) + { + u8 uCID = 0; + uCID = (u8)(ureg_data >> 16); + xil_printf("[E] CPLD #1 Firmware mismatch!\r\n[D] Expect CPLD ID == 1, but we received CPLD ID = 0x%02X\r\n",uCID); + uCPLD_Count -= 1; + } + else + { + u8 uMajorV = 0; + u8 uMinorV = 0; + u8 uFixV = 0; + + uMajorV = (u8)((ureg_data & 0x0f00)>>8); + uMinorV = (u8)((ureg_data & 0xf0)>>4); + uFixV = (u8)(ureg_data & 0xf); + + xil_printf("[I]\t Successfully Found CPLD #1!\r\n"); + xil_printf("[I]\t CPLD #1 Version: v%02d.%02d.%02d\r\n",uMajorV,uMinorV,uFixV); + } + } + } + + xil_printf("[-]\t Checking CPLD #2\r\n"); + //Read CPLD IDENT Reg + iStatus = CPLD_Read(0x2,0x0,&ureg_data); + if (iStatus != XST_SUCCESS) + { + xil_printf("[E] CPLD #2 Communication Failed!\r\n"); + uCPLD_Count -= 1; + } + else + { + if (ureg_data == 0x0) + { + xil_printf("[E] CPLD #2 Not present! Or SPI communication Failed!\r\n"); + uCPLD_Count -= 1; + } + else + { + if ((ureg_data & 0x400000) != 0x400000) + { + u8 uCID = 0; + uCID = (u8)(ureg_data >> 16); + xil_printf("[E] CPLD #2 Firmware mismatch!\r\n[D] Expect CPLD ID == 2, but we received CPLD ID = 0x%02X\r\n",uCID); + uCPLD_Count -= 1; + } + else + { + u8 uMajorV = 0; + u8 uMinorV = 0; + u8 uFixV = 0; + + uMajorV = (u8)((ureg_data & 0x0f00)>>8); + uMinorV = (u8)((ureg_data & 0xf0)>>4); + uFixV = (u8)(ureg_data & 0xf); + + xil_printf("[I]\t Successfully Found CPLD #2!\r\n"); + xil_printf("[I]\t CPLD #2 Version: v%02d.%02d.%02d\r\n",uMajorV,uMinorV,uFixV); + } + } + } + + xil_printf("[-]\t Checking CPLD #3\r\n"); + //Read CPLD IDENT Reg + iStatus = CPLD_Read(0x3,0x0,&ureg_data); + if (iStatus != XST_SUCCESS) + { + xil_printf("[E] CPLD #3 Communication Failed!\r\n"); + uCPLD_Count -= 1; + } + else + { + if (ureg_data == 0x0) + { + xil_printf("[E] CPLD #3 Not present! Or SPI communication Failed!\r\n"); + uCPLD_Count -= 1; + } + else + { + if ((ureg_data & 0x800000) != 0x800000) + { + u8 uCID = 0; + uCID = (u8)(ureg_data >> 16); + xil_printf("[E] CPLD #3 Firmware mismatch! Expect CPLD ID == 3, but we received CPLD ID = 0x%02X\r\n",uCID); + uCPLD_Count -= 1; + } + else + { + u8 uMajorV = 0; + u8 uMinorV = 0; + u8 uFixV = 0; + + uMajorV = (u8)((ureg_data & 0x0f00)>>8); + uMinorV = (u8)((ureg_data & 0xf0)>>4); + uFixV = (u8)(ureg_data & 0xf); + + xil_printf("[I]\t Successfully Found CPLD #3!\r\n"); + xil_printf("[I]\t CPLD #3 Version: v%02d.%02d.%02d\r\n",uMajorV,uMinorV,uFixV); + } + } + } + if(uCPLD_Count == 3) + { + return XST_SUCCESS; + } + else + { + xil_printf("[E] Only %d/3 CPLD Device is/are healthy\r\n",uCPLD_Count); + return XST_DEVICE_NOT_FOUND; + } +} + int CPLD_Write(u8 addr,u32 data) { u16 reg_addr = addr | 0x80; //Write bit set to 1'b1 @@ -27,17 +164,17 @@ int CPLD_Read(u8 CPLDSel, u8 reg_addr, u32* reg_data) { case 1: { - reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U1); + *reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U1); break; } case 2: { - reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U2); + *reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U2); break; } case 3: { - reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U3); + *reg_data = uspi_read_onewire(reg_addr, dat_width,CPLD_U3); break; } @@ -47,6 +184,7 @@ int CPLD_Read(u8 CPLDSel, u8 reg_addr, u32* reg_data) return XST_INVALID_PARAM; } } + return XST_SUCCESS; } int CPLD_Read_ALL(u8 reg_addr, u32* reg_data) diff --git a/NewExtInst_Zynq_Net/src/CPLD_Con.h b/NewExtInst_Zynq_Net/src/CPLD_Con.h index c9bf8ee..6359db7 100644 --- a/NewExtInst_Zynq_Net/src/CPLD_Con.h +++ b/NewExtInst_Zynq_Net/src/CPLD_Con.h @@ -9,6 +9,7 @@ #define dat_width 3 +int CPLD_Checkin(); int CPLD_Write(u8 addr,u32 data); int CPLD_Read(u8 CPLDSel, u8 reg_addr, u32* reg_data); int CPLD_Read_ALL(u8 reg_addr, u32* reg_data); diff --git a/NewExtInst_Zynq_Net/src/cal_meas.c b/NewExtInst_Zynq_Net/src/cal_meas.c index 9f7d810..242ed67 100644 --- a/NewExtInst_Zynq_Net/src/cal_meas.c +++ b/NewExtInst_Zynq_Net/src/cal_meas.c @@ -9,6 +9,7 @@ int Command_Parser(u8* recvbuffer, u8 len) { + int iStatus = -255; switch (recvbuffer[0]) { case 0x00: @@ -17,10 +18,11 @@ int Command_Parser(u8* recvbuffer, u8 len) if (len != CPLD_SPI_READ + 1) { xil_printf("[E] Command Length Mismatch!\r\n[I] CPLD Read Format: \"00 [CPLD] [REG Addr]\"\r\n"); + return XST_INVALID_PARAM; } u32 reg_data = 0x0; - reg_data = CPLD_Read(recvbuffer + 1, recvbuffer + 2, reg_data); - xil_printf("[I] CPLD #%d: REG Addr #0x%01X: Data=0x%03X\r\n",recvbuffer + 1, recvbuffer + 2, reg_data); + iStatus = CPLD_Read(recvbuffer[1], recvbuffer[2], ®_data); + xil_printf("[I] CPLD #%d: REG Addr #0x%01X: Data=0x%06X\r\n",recvbuffer[1], recvbuffer[2], reg_data); break; } case 0x01: @@ -37,11 +39,22 @@ int Command_Parser(u8* recvbuffer, u8 len) } case 0xA0: { + int iStatus = -255; xil_printf("[D] Matched Command Reset\r\n"); rst_CPLD(CPLD_U1,4); rst_CPLD(CPLD_U2,4); rst_CPLD(CPLD_U3,4); xil_printf("[I] CPLD RST Done\r\n"); + iStatus = CPLD_Checkin(); + if (iStatus != XST_SUCCESS) + { + xil_printf("[E] CPLD Check-in Failed!\r\n"); + return XST_FAILURE; + } + else + { + xil_printf("[I] All 3/3 CPLD Checked In!\r\n"); + } break; } case 0xA1: //DC Cal @@ -105,9 +118,9 @@ int DC_Control(u8* idata) //Let's do some sanity check //Slot - if ((u_slot > 4) || (u_slot == 0)) + if (u_slot > 4) { - xil_printf("[E] Illege Slot Num check Command! (Slot:1-4)\r\n"); + xil_printf("[E] Illege Slot Num check Command! (Slot:0(OFF)-4)\r\n"); cmdValid = -1; } //Dev Sel @@ -132,7 +145,7 @@ int DC_Control(u8* idata) if ((u_ch_Num < 1) || (u_ch_Num > 64)) { - xil_printf("[E] Illege Channel! (PMU Ch:0x0001-0x0040)\r\n"); + xil_printf("[E] Illege Channel! (DPS Ch:0x0000-0x0040)\r\n"); cmdValid = -3; } } @@ -144,9 +157,9 @@ int DC_Control(u8* idata) cmdValid = -5; } //RLoad Sel - if ((u_rLoad > 18) || (u_rLoad == 0)) + if (u_rLoad > 18) { - xil_printf("[E] Illege RLoad Select check Command! (RLoad:0x01-0x12)\r\n"); + xil_printf("[E] Illege RLoad Select check Command! (RLoad:0x00(OPEN)-0x12)\r\n"); cmdValid = -6; } if (cmdValid != 1) diff --git a/NewExtInst_Zynq_Net/src/main.c b/NewExtInst_Zynq_Net/src/main.c index 218e8c0..2e913f9 100644 --- a/NewExtInst_Zynq_Net/src/main.c +++ b/NewExtInst_Zynq_Net/src/main.c @@ -28,29 +28,50 @@ #include #include "xparameters.h" -#include "platform.h" #include "platform_config.h" #if defined (__arm__) || defined(__aarch64__) #include "xil_printf.h" #endif +#include +#include "xparameters.h" +#include "netif/xadapter.h" +#include "platform_config.h" +#include "lwipopts.h" +#include "xil_printf.h" +#include "sleep.h" +#include "lwip/priv/tcp_priv.h" +#include "lwip/init.h" +#include "lwip/inet.h" #include "xil_cache.h" -#include "lwip/tcp.h" extern void tcp_tmr(void); /* declared in tcp_priv.h, not in public tcp.h */ #include "xil_cache.h" #if LWIP_DHCP==1 - #include "lwip/dhcp.h" +#include "lwip/dhcp.h" +extern volatile int dhcp_timoutcntr; #endif #include "GPIO_Driv.h" #include "SPI_Driv.h" #include "cal_meas.h" #include "uart_IO.h" +#include "CPLD_Con.h" #include "lwip_server.h" +#define MAJORV 0 +#define MINORV 1 +#define FIXV 3 + +#define DEFAULT_IP_ADDRESS "192.168.100.110" +#define DEFAULT_IP_MASK "255.255.255.0" +#define DEFAULT_GW_ADDRESS "192.168.100.1" + u8 recvbuffer[1024] = {0}; +extern volatile int TcpFastTmrFlag; +extern volatile int TcpSlowTmrFlag; + /* defined by each RAW mode application */ void print_app_header(); int start_application(); @@ -59,38 +80,49 @@ int transfer_data(); /* missing declaration in lwIP */ void lwip_init(); -#if LWIP_IPV6==0 - #if LWIP_DHCP==1 - volatile int dhcp_timoutcntr; - err_t dhcp_start(struct netif *netif); - #endif -#endif +struct netif server_netif; +struct netif *netif; -static struct netif server_netif; -struct netif *echo_netif; - -void print_ip(char *msg, ip_addr_t *ip) +static void print_ip(char *msg, ip_addr_t *ip) { print(msg); - xil_printf("%d.%d.%d.%d\n\r", ip4_addr1(ip), ip4_addr2(ip), + xil_printf("%d.%d.%d.%d\r\n", ip4_addr1(ip), ip4_addr2(ip), ip4_addr3(ip), ip4_addr4(ip)); } -void print_ip_settings(ip_addr_t *ip, ip_addr_t *mask, ip_addr_t *gw) +static void print_ip_settings(ip_addr_t *ip, ip_addr_t *mask, ip_addr_t *gw) { + print_ip("Board IP: ", ip); + print_ip("Netmask : ", mask); + print_ip("Gateway : ", gw); +} - print_ip("Board IP: ", ip); - print_ip("Netmask : ", mask); - print_ip("Gateway : ", gw); +static void assign_default_ip(ip_addr_t *ip, ip_addr_t *mask, ip_addr_t *gw) +{ + int err; + + xil_printf("Configuring default IP %s \r\n", DEFAULT_IP_ADDRESS); + + err = inet_aton(DEFAULT_IP_ADDRESS, ip); + if (!err) + xil_printf("Invalid default IP address: %d\r\n", err); + + err = inet_aton(DEFAULT_IP_MASK, mask); + if (!err) + xil_printf("Invalid default IP MASK: %d\r\n", err); + + err = inet_aton(DEFAULT_GW_ADDRESS, gw); + if (!err) + xil_printf("Invalid default gateway address: %d\r\n", err); } static int net_is_available(void) { - if (echo_netif == NULL) + if (netif == NULL) return 0; - if (!netif_is_up(echo_netif)) + if (!netif_is_up(netif)) return 0; - if (echo_netif->ip_addr.addr == 0) + if (netif->ip_addr.addr == 0) return 0; return 1; } @@ -98,68 +130,58 @@ static int net_is_available(void) int main() { int iMainCom = 1; + int iStatus = -255; ip_addr_t ipaddr, netmask, gw; unsigned char mac_ethernet_address[] = { 0x00, 0x0a, 0x35, 0x00, 0x01, 0x01 }; - echo_netif = &server_netif; + netif = &server_netif; init_platform(); -#if LWIP_IPV6==0 - #if LWIP_DHCP==1 - ipaddr.addr = 0; - gw.addr = 0; - netmask.addr = 0; - #else - /* initialize IP addresses to be used */ - IP4_ADDR(&ipaddr, 192, 168, 100, 110); - IP4_ADDR(&netmask, 255, 255, 255, 0); - IP4_ADDR(&gw, 192, 168, 100, 1); - #endif -#endif //LWIP Related Init Start lwip_init(); - if (!xemac_add(echo_netif, &ipaddr, &netmask, - &gw, mac_ethernet_address, - PLATFORM_EMAC_BASEADDR)) - { - xil_printf("Error adding N/W interface\n\r"); + /* Add network interface to the netif_list, and set it as default */ + if (!xemac_add(netif, NULL, NULL, NULL, mac_ethernet_address, + PLATFORM_EMAC_BASEADDR)) { + xil_printf("Error adding N/W interface\r\n"); return -1; } + netif_set_default(netif); - netif_set_default(echo_netif); +#ifndef SDT + /* now enable interrupts */ + platform_enable_interrupts(); +#endif /* specify that the network if is up */ - netif_set_up(echo_netif); - + netif_set_up(netif); + #if (LWIP_DHCP==1) /* Create a new DHCP client for this interface. * Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at * the predefined regular intervals after starting the client. */ - dhcp_start(echo_netif); - dhcp_timoutcntr = 24; - - while(((echo_netif->ip_addr.addr) == 0) && (dhcp_timoutcntr > 0)) - xemacif_input(echo_netif); + dhcp_start(netif); + dhcp_timoutcntr = 3; + while (((netif->ip_addr.addr) == 0) && (dhcp_timoutcntr > 0)) + xemacif_input(netif); if (dhcp_timoutcntr <= 0) { - if ((echo_netif->ip_addr.addr) == 0) { - xil_printf("DHCP Timeout\r\n"); - xil_printf("Configuring default IP of 192.168.100.110\r\n"); - IP4_ADDR(&(echo_netif->ip_addr), 192, 168, 100, 110); - IP4_ADDR(&(echo_netif->netmask), 255, 255, 255, 0); - IP4_ADDR(&(echo_netif->gw), 192, 168, 100, 1); + if ((netif->ip_addr.addr) == 0) { + xil_printf("ERROR: DHCP request timed out\r\n"); + assign_default_ip(&(netif->ip_addr), + &(netif->netmask), &(netif->gw)); } } - ipaddr.addr = echo_netif->ip_addr.addr; - gw.addr = echo_netif->gw.addr; - netmask.addr = echo_netif->netmask.addr; + /* print IP address, netmask and gateway */ +#else + assign_default_ip(&(netif->ip_addr), &(netif->netmask), &(netif->gw)); #endif + print_ip_settings(&(netif->ip_addr), &(netif->netmask), &(netif->gw)); - print_ip_settings(&ipaddr, &netmask, &gw); + xil_printf("\r\n"); /* start the application (web server, rxtest, txtest, etc..) */ start_application(); @@ -172,9 +194,8 @@ int main() iMainCom = 0; } - xil_printf("=====================\r\n[I] System Init Done!=====================\r\n"); - - + xil_printf("\r\n=====================[I] System Init Done!=====================\r\n"); + xil_printf("\r\n[I] Zynq Version:NewInstCal v%d.%d.%d\r\n\r\n",MAJORV,MINORV,FIXV); xil_printf("[D] Start EMIO Config\r\n"); EMIO_config(); @@ -191,16 +212,34 @@ int main() interface_initial(CPLD_U2); interface_initial(CPLD_U3); - xil_printf("\r\n=====================[I] Board Init Complete!\r\n=====================[I] Waiting for Command...\r\n"); + iStatus = CPLD_Checkin(); + if (iStatus != XST_SUCCESS) + { + xil_printf("[E] main() stopped!\r\n"); + return XST_FAILURE; + } + else + { + xil_printf("[I] All 3/3 CPLD Checked In!\r\n"); + } + + + xil_printf("\r\n=====================[I] Board Init Complete!=====================\r\n[I] Waiting for Command...\r\n"); /* receive and process Instructions */ if (iMainCom == 1) { print_app_header(); while (1) { - tcp_tmr(); - xemacif_input(echo_netif); - transfer_data(); + if (TcpFastTmrFlag) { + tcp_fasttmr(); + TcpFastTmrFlag = 0; + } + if (TcpSlowTmrFlag) { + tcp_slowtmr(); + TcpSlowTmrFlag = 0; + } + xemacif_input(netif); } } else diff --git a/NewExtInst_Zynq_Net/src/platform.c b/NewExtInst_Zynq_Net/src/platform.c deleted file mode 100644 index fc0d17c..0000000 --- a/NewExtInst_Zynq_Net/src/platform.c +++ /dev/null @@ -1,86 +0,0 @@ -/****************************************************************************** -* Copyright (C) 2023 Advanced Micro Devices, Inc. All Rights Reserved. -* SPDX-License-Identifier: MIT -******************************************************************************/ - -#include "xparameters.h" -#include "xil_cache.h" - -#ifndef SDT -#include "platform_config.h" -#endif - -/* - * Uncomment one of the following two lines, depending on the target, - * if ps7/psu init source files are added in the source directory for - * compiling example outside of SDK. - */ -/*#include "ps7_init.h"*/ -/*#include "psu_init.h"*/ - -#ifdef STDOUT_IS_16550 - #include "xuartns550_l.h" - - #define UART_BAUD 9600 -#endif - -void -enable_caches() -{ -#ifdef __PPC__ - Xil_ICacheEnableRegion(CACHEABLE_REGION_MASK); - Xil_DCacheEnableRegion(CACHEABLE_REGION_MASK); -#elif __MICROBLAZE__ -#ifdef XPAR_MICROBLAZE_USE_ICACHE - Xil_ICacheEnable(); -#endif -#ifdef XPAR_MICROBLAZE_USE_DCACHE - Xil_DCacheEnable(); -#endif -#endif -} - -void -disable_caches() -{ -#ifdef __MICROBLAZE__ -#ifdef XPAR_MICROBLAZE_USE_DCACHE - Xil_DCacheDisable(); -#endif -#ifdef XPAR_MICROBLAZE_USE_ICACHE - Xil_ICacheDisable(); -#endif -#endif -} - -void -init_uart() -{ -#ifdef STDOUT_IS_16550 - XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, UART_BAUD); - XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS); -#endif - /* Bootrom/BSP configures PS7/PSU UART to 115200 bps */ -} - -void -init_platform() -{ - /* - * If you want to run this example outside of SDK, - * uncomment one of the following two lines and also #include "ps7_init.h" - * or #include "ps7_init.h" at the top, depending on the target. - * Make sure that the ps7/psu_init.c and ps7/psu_init.h files are included - * along with this example source files for compilation. - */ - /* ps7_init();*/ - /* psu_init();*/ - enable_caches(); - init_uart(); -} - -void -cleanup_platform() -{ - disable_caches(); -} diff --git a/NewExtInst_Zynq_Net/src/platform.h b/NewExtInst_Zynq_Net/src/platform.h deleted file mode 100644 index b6119e6..0000000 --- a/NewExtInst_Zynq_Net/src/platform.h +++ /dev/null @@ -1,16 +0,0 @@ -/****************************************************************************** -* Copyright (C) 2023 Advanced Micro Devices, Inc. All Rights Reserved. -* SPDX-License-Identifier: MIT -******************************************************************************/ - -#ifndef __PLATFORM_H_ -#define __PLATFORM_H_ - -#ifndef SDT -#include "platform_config.h" -#endif - -void init_platform(); -void cleanup_platform(); - -#endif diff --git a/NewExtInst_Zynq_Net/src/platform_config.h b/NewExtInst_Zynq_Net/src/platform_config.h index 1a7f3ff..f476e88 100644 --- a/NewExtInst_Zynq_Net/src/platform_config.h +++ b/NewExtInst_Zynq_Net/src/platform_config.h @@ -6,4 +6,6 @@ #define PLATFORM_EMAC_BASEADDR XPAR_XEMACPS_0_BASEADDR +#define PLATFORM_ZYNQ + #endif diff --git a/NewExtInst_Zynq_Net/src/platform_zynq.c b/NewExtInst_Zynq_Net/src/platform_zynq.c new file mode 100644 index 0000000..0fa3e27 --- /dev/null +++ b/NewExtInst_Zynq_Net/src/platform_zynq.c @@ -0,0 +1,238 @@ +/* + * Copyright (C) 2010 - 2022 Xilinx, Inc. + * Copyright (C) 2022 - 2023 Advanced Micro Devices, Inc. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + */ +/* +* platform_zynq.c +* +* Zynq platform specific functions. +* +* 02/29/2012: UART initialization is removed. Timer initializations are +* removed. All unnecessary include files and hash defines are removed. +* 03/01/2013: Timer initialization is added back. Support for SI #692601 is +* added in the timer callback. The SI #692601 refers to the following issue. +* +* The EmacPs has a HW bug on the Rx path for heavy Rx traffic. +* Under heavy Rx traffic because of the HW bug there are times when the Rx path +* becomes unresponsive. The workaround for it is to check for the Rx path for +* traffic (by reading the stats registers regularly). If the stats register +* does not increment for sometime (proving no Rx traffic), the function resets +* the Rx data path. +* +* + */ + +#ifndef SDT +#ifdef __arm__ + +#include "xparameters.h" +#include "xparameters_ps.h" /* defines XPAR values */ +#include "xil_cache.h" +#include "xscugic.h" +#include "lwip/tcp.h" +#include "xil_printf.h" +#include "platform_config.h" +#include "netif/xadapter.h" +#ifdef PLATFORM_ZYNQ +#include "xscutimer.h" +#include "xtime_l.h" + +#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID +#define TIMER_DEVICE_ID XPAR_SCUTIMER_DEVICE_ID +#define INTC_BASE_ADDR XPAR_SCUGIC_0_CPU_BASEADDR +#define INTC_DIST_BASE_ADDR XPAR_SCUGIC_0_DIST_BASEADDR +#define TIMER_IRPT_INTR XPAR_SCUTIMER_INTR + +#define RESET_RX_CNTR_LIMIT 400 + +void tcp_fasttmr(void); +void tcp_slowtmr(void); + +static XScuTimer TimerInstance; + +#ifndef USE_SOFTETH_ON_ZYNQ +static int ResetRxCntr = 0; +extern struct netif server_netif; +#endif + +volatile int TcpFastTmrFlag = 0; +volatile int TcpSlowTmrFlag = 0; + +#if LWIP_DHCP==1 +volatile int dhcp_timoutcntr = 24; +void dhcp_fine_tmr(); +void dhcp_coarse_tmr(); +#endif + +void +timer_callback(XScuTimer * TimerInstance) +{ + /* we need to call tcp_fasttmr & tcp_slowtmr at intervals specified + * by lwIP. It is not important that the timing is absoluetly accurate. + */ + static int odd = 1; +#if LWIP_DHCP==1 + static int dhcp_timer = 0; +#endif + TcpFastTmrFlag = 1; + + odd = !odd; +#ifndef USE_SOFTETH_ON_ZYNQ + ResetRxCntr++; +#endif + if (odd) { +#if LWIP_DHCP==1 + dhcp_timer++; + dhcp_timoutcntr--; +#endif + TcpSlowTmrFlag = 1; +#if LWIP_DHCP==1 + dhcp_fine_tmr(); + if (dhcp_timer >= 120) { + dhcp_coarse_tmr(); + dhcp_timer = 0; + } +#endif + } + + /* For providing an SW alternative for the SI #692601. Under heavy + * Rx traffic if at some point the Rx path becomes unresponsive, the + * following API call will ensures a SW reset of the Rx path. The + * API xemacpsif_resetrx_on_no_rxdata is called every 100 milliseconds. + * This ensures that if the above HW bug is hit, in the worst case, + * the Rx path cannot become unresponsive for more than 100 + * milliseconds. + */ +#ifndef USE_SOFTETH_ON_ZYNQ + if (ResetRxCntr >= RESET_RX_CNTR_LIMIT) { + xemacpsif_resetrx_on_no_rxdata(&server_netif); + ResetRxCntr = 0; + } +#endif + XScuTimer_ClearInterruptStatus(TimerInstance); +} + +void platform_setup_timer(void) +{ + int Status = XST_SUCCESS; + XScuTimer_Config *ConfigPtr; + int TimerLoadValue = 0; + + ConfigPtr = XScuTimer_LookupConfig(TIMER_DEVICE_ID); + Status = XScuTimer_CfgInitialize(&TimerInstance, ConfigPtr, + ConfigPtr->BaseAddr); + if (Status != XST_SUCCESS) { + + xil_printf("In %s: Scutimer Cfg initialization failed...\r\n", + __func__); + return; + } + + Status = XScuTimer_SelfTest(&TimerInstance); + if (Status != XST_SUCCESS) { + xil_printf("In %s: Scutimer Self test failed...\r\n", + __func__); + return; + + } + + XScuTimer_EnableAutoReload(&TimerInstance); + /* + * Set for 250 milli seconds timeout. + */ + TimerLoadValue = XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 8; + + XScuTimer_LoadTimer(&TimerInstance, TimerLoadValue); + return; +} + +void platform_setup_interrupts(void) +{ + Xil_ExceptionInit(); + + XScuGic_DeviceInitialize(INTC_DEVICE_ID); + + /* + * Connect the interrupt controller interrupt handler to the hardware + * interrupt handling logic in the processor. + */ + Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT, + (Xil_ExceptionHandler)XScuGic_DeviceInterruptHandler, + (void *)INTC_DEVICE_ID); + /* + * Connect the device driver handler that will be called when an + * interrupt for the device occurs, the handler defined above performs + * the specific interrupt processing for the device. + */ + XScuGic_RegisterHandler(INTC_BASE_ADDR, TIMER_IRPT_INTR, + (Xil_ExceptionHandler)timer_callback, + (void *)&TimerInstance); + /* + * Enable the interrupt for scu timer. + */ + XScuGic_EnableIntr(INTC_DIST_BASE_ADDR, TIMER_IRPT_INTR); + + return; +} + +void platform_enable_interrupts() +{ + /* + * Enable non-critical exceptions. + */ + Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ); + XScuTimer_EnableInterrupt(&TimerInstance); + XScuTimer_Start(&TimerInstance); + return; +} + +void init_platform() +{ + platform_setup_timer(); + platform_setup_interrupts(); + + return; +} + +void cleanup_platform() +{ + Xil_ICacheDisable(); + Xil_DCacheDisable(); + return; +} + +u64_t get_time_ms() +{ +#define COUNTS_PER_MILLI_SECOND (COUNTS_PER_SECOND/1000) + XTime tCur = 0; + XTime_GetTime(&tCur); + return (tCur/COUNTS_PER_MILLI_SECOND); +} + +#endif +#endif +#endif /* NOT SDT */ diff --git a/NewExtInst_Zynq_Net/src/uart_IO.h b/NewExtInst_Zynq_Net/src/uart_IO.h index 224ee5e..21966b9 100644 --- a/NewExtInst_Zynq_Net/src/uart_IO.h +++ b/NewExtInst_Zynq_Net/src/uart_IO.h @@ -3,8 +3,6 @@ #include #include "xparameters.h" -#include "platform.h" -#include "platform.h" #include "xil_types.h" #include "xil_printf.h" diff --git a/NewExtInst_Zynq_Net_system/Debug/sd_card/BOOT.BIN b/NewExtInst_Zynq_Net_system/Debug/sd_card/BOOT.BIN deleted file mode 100644 index adc30c6..0000000 Binary files a/NewExtInst_Zynq_Net_system/Debug/sd_card/BOOT.BIN and /dev/null differ diff --git a/NewExtInst_Zynq_Net_system/Debug/sd_card/README.txt b/NewExtInst_Zynq_Net_system/Debug/sd_card/README.txt deleted file mode 100644 index 6f2882d..0000000 --- a/NewExtInst_Zynq_Net_system/Debug/sd_card/README.txt +++ /dev/null @@ -1,8 +0,0 @@ --= SD card boot image =- - -Platform: NewExtInst_bsp -Application: system_wrapper - -1. Copy the contents of this directory to an SD card -2. Set boot mode to SD -3. Insert SD card and turn board on diff --git a/NewExtInst_Zynq_Net_system/NewExtInst_Zynq_Net_system.sprj b/NewExtInst_Zynq_Net_system/NewExtInst_Zynq_Net_system.sprj index 678ec79..a47605c 100644 --- a/NewExtInst_Zynq_Net_system/NewExtInst_Zynq_Net_system.sprj +++ b/NewExtInst_Zynq_Net_system/NewExtInst_Zynq_Net_system.sprj @@ -1,5 +1,5 @@ - + diff --git a/NewExtInst_bsp/.cproject b/NewExtInst_bsp/.cproject index 6875c99..90669dc 100644 --- a/NewExtInst_bsp/.cproject +++ b/NewExtInst_bsp/.cproject @@ -3,9 +3,9 @@ - + - + diff --git a/NewExtInst_bsp/.project b/NewExtInst_bsp/.project index 2f55a1e..c40d8b8 100644 --- a/NewExtInst_bsp/.project +++ b/NewExtInst_bsp/.project @@ -1,6 +1,6 @@ - NewExtInst_bsp + NewExtInst_BSP Created by Vitis v2023.2 diff --git a/NewExtInst_bsp/platform.spr b/NewExtInst_bsp/platform.spr index 9bcdfd1..54b9a38 100644 --- a/NewExtInst_bsp/platform.spr +++ b/NewExtInst_bsp/platform.spr @@ -1 +1 @@ -{"platformName":"NewExtInst_bsp","sprVersion":"2.0","mode":"gui","dsaType":"Fixed","platformDesc":"NewExtInst_bsp","platHandOff":"/data/work/prj/New_CalBoard/2.FW/Zynq/Cal_Net/system_wrapper.xsa","platIntHandOff":"/hw/system_wrapper.xsa","deviceType":"zynq","platIsPrebuiltAutogen":"false","platIsNoBootBsp":"false","hasFsblMakeHasChanges":"false","hasPmufwMakeHasChanges":"false","fsblExtraCompilerFlags":"-MMD -MP -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard ","platPreBuiltFlag":false,"platformSamplesDir":"","platActiveSys":"NewExtInst_bsp","systems":[{"systemName":"NewExtInst_bsp","systemDesc":"NewExtInst_bsp","sysIsBootAutoGen":"true","systemDispName":"NewExtInst_bsp","sysActiveDom":"standalone_domain","sysDefaultDom":"standalone_domain","domains":[{"domainName":"zynq_fsbl","domainDispName":"zynq_fsbl","domainDesc":"FSBL Application BSP - Auto Generated.","processors":"ps7_cortexa9_0","os":"standalone","sdxOs":"standalone","debugEnable":"","domRuntimes":["cpp"],"swRepo":"","mssOsVer":"9.0","mssFile":"","md5Digest":"88a630cf45945e27dbb40d72cff1145a","compatibleApp":"zynq_fsbl","domType":"bootDomain","arch":"32-bit","appSettings":{"appCompilerFlags":"","appLinkerFlags":""},"addedLibs":["xilffs:5.1","xilrsa:1.7"],"libOptions":{"libsContainingOptions":[]},"prebuiltLibs":{"prebuiltIncPath":[],"prebuiltLibPath":[]},"isolation":{}},{"domainName":"standalone_domain","domainDispName":"standalone on ps7_cortexa9_0","domainDesc":"standalone_domain","processors":"ps7_cortexa9_0","os":"standalone","sdxOs":"standalone","qemuArgs":"/resources/NewExtInst_bsp/standalone_domain/qemu_args.txt","qemuData":"/resources/NewExtInst_bsp/standalone_domain/qemu","debugEnable":"False","domRuntimes":["cpp"],"swRepo":"","mssOsVer":"9.0","mssFile":"","md5Digest":"f4fce35bc8f5e8642060320c73bb7c84","compatibleApp":"","domType":"mssDomain","appSettings":{"appCompilerFlags":"","appLinkerFlags":""},"addedLibs":["lwip213:1.1"],"libOptions":{"lwip213":{"dhcp_does_arp_check":"true","lwip_dhcp":"true","libOptionNames":["dhcp_does_arp_check","lwip_dhcp"]},"libsContainingOptions":["lwip213"]},"prebuiltLibs":{"prebuiltIncPath":[],"prebuiltLibPath":[]},"isolation":{}}]}]} +{"platformName":"NewExtInst_BSP","sprVersion":"2.0","mode":"gui","dsaType":"Fixed","platformDesc":"NewExtInst_BSP","platHandOff":"C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/Zynq/Net_Cal/system_wrapper.xsa","platIntHandOff":"/hw/system_wrapper.xsa","deviceType":"zynq","platIsPrebuiltAutogen":"false","platIsNoBootBsp":"false","hasFsblMakeHasChanges":"false","hasPmufwMakeHasChanges":"false","fsblExtraCompilerFlags":"-MMD -MP -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard ","platPreBuiltFlag":false,"platformSamplesDir":"","platActiveSys":"NewExtInst_BSP","systems":[{"systemName":"NewExtInst_BSP","systemDesc":"NewExtInst_BSP","sysIsBootAutoGen":"true","systemDispName":"NewExtInst_BSP","sysActiveDom":"standalone_domain","sysDefaultDom":"standalone_domain","domains":[{"domainName":"zynq_fsbl","domainDispName":"zynq_fsbl","domainDesc":"FSBL Application BSP - Auto Generated.","processors":"ps7_cortexa9_0","os":"standalone","sdxOs":"standalone","debugEnable":"","domRuntimes":["cpp"],"swRepo":"","mssOsVer":"9.0","mssFile":"","md5Digest":"3243e54020e3af7b58d483729f3822a1","compatibleApp":"zynq_fsbl","domType":"bootDomain","arch":"32-bit","appSettings":{"appCompilerFlags":"","appLinkerFlags":""},"addedLibs":["xilffs:5.1","xilrsa:1.7"],"libOptions":{"libsContainingOptions":[]},"prebuiltLibs":{"prebuiltIncPath":[],"prebuiltLibPath":[]},"isolation":{}},{"domainName":"standalone_domain","domainDispName":"standalone on ps7_cortexa9_0","domainDesc":"standalone_domain","processors":"ps7_cortexa9_0","os":"standalone","sdxOs":"standalone","qemuArgs":"/resources/NewExtInst_BSP/standalone_domain/qemu_args.txt","qemuData":"/resources/NewExtInst_BSP/standalone_domain/qemu","debugEnable":"False","domRuntimes":["cpp"],"swRepo":"","mssOsVer":"9.0","mssFile":"","md5Digest":"89622e7dd40f4ebcc78d10cff01d935b","compatibleApp":"","domType":"mssDomain","appSettings":{"appCompilerFlags":"","appLinkerFlags":""},"addedLibs":["lwip213:1.1"],"libOptions":{"lwip213":{"dhcp_does_arp_check":"true","lwip_dhcp":"true","libOptionNames":["dhcp_does_arp_check","lwip_dhcp"]},"libsContainingOptions":["lwip213"]},"prebuiltLibs":{"prebuiltIncPath":[],"prebuiltLibPath":[]},"isolation":{}}]}]} diff --git a/NewExtInst_bsp/platform.tcl b/NewExtInst_bsp/platform.tcl index 5e04076..03be670 100644 --- a/NewExtInst_bsp/platform.tcl +++ b/NewExtInst_bsp/platform.tcl @@ -1,42 +1,48 @@ # # Usage: To re-create this platform project launch xsct with below options. -# xsct /data/work/prj/New_CalBoard/2.FW/Zynq/Cal_Net/NewExtInst_bsp/platform.tcl +# xsct C:\Users\testrong\Documents\Work\NewInstrCalBoard\2.FW\Zynq\Net_Cal\NewExtInst_BSP\platform.tcl # # OR launch xsct and run below command. -# source /data/work/prj/New_CalBoard/2.FW/Zynq/Cal_Net/NewExtInst_bsp/platform.tcl +# source C:\Users\testrong\Documents\Work\NewInstrCalBoard\2.FW\Zynq\Net_Cal\NewExtInst_BSP\platform.tcl # # To create the platform in a different location, modify the -out option of "platform create" command. # -out option specifies the output directory of the platform project. -platform create -name {NewExtInst_bsp}\ --hw {/data/work/prj/New_CalBoard/2.FW/Zynq/Cal_Net/system_wrapper.xsa}\ --proc {ps7_cortexa9_0} -os {standalone} -out {/data/work/prj/New_CalBoard/2.FW/Zynq/Cal_Net} +platform create -name {NewExtInst_BSP}\ +-hw {C:\Users\testrong\Documents\Work\NewInstrCalBoard\2.FW\Zynq\Net_Cal\system_wrapper.xsa}\ +-proc {ps7_cortexa9_0} -os {standalone} -out {C:/Users/testrong/Documents/Work/NewInstrCalBoard/2.FW/Zynq/Net_Cal} platform write platform generate -domains -platform active {NewExtInst_bsp} -platform generate -domain active {zynq_fsbl} +platform active {NewExtInst_BSP} bsp reload bsp setlib -name lwip213 -ver 1.1 -bsp config lwip_dhcp "true" -bsp config dhcp_does_arp_check "true" -bsp write -bsp reload -catch {bsp regenerate} -platform generate -domains zynq_fsbl bsp removelib -name lwip213 -bsp write -bsp reload -catch {bsp regenerate} -domain active {standalone_domain} +bsp setlib -name lwip213 -ver 1.1 +bsp removelib -name lwip213 +bsp setlib -name lwip213 -ver 1.1 +bsp removelib -name lwip213 bsp reload bsp setlib -name lwip213 -ver 1.1 +bsp removelib -name lwip213 +bsp setlib -name lwip213 -ver 1.1 +bsp removelib -name lwip213 +bsp setlib -name lwip213 -ver 1.1 +bsp removelib -name lwip213 +bsp setlib -name lwip213 -ver 1.1 +bsp removelib -name lwip213 +bsp setlib -name lwip213 -ver 1.1 +bsp removelib -name lwip213 +bsp setlib -name lwip213 -ver 1.1 bsp config dhcp_does_arp_check "true" bsp config lwip_dhcp "true" bsp write bsp reload catch {bsp regenerate} -platform generate -domains standalone_domain,zynq_fsbl -bsp write -platform generate -domains +platform generate +platform clean +platform generate +platform clean +platform generate +platform clean +platform generate