yuysh/Formal_NewInstrCalBoard_Zynq
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Fix cmd mismatch

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yuysh
2026-06-18 09:36:10 +08:00
parent ec6b77d21c
commit 512c80f811
3 changed files with 12 additions and 4 deletions
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NewExtInst_Zynq_Net/Debug/NewExtInst_Zynq_Net.elf
BIN
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NewExtInst_Zynq_Net/src/cal_meas.c
+9 -1
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@@ -189,7 +189,15 @@ int DC_Control(u8* idata)
{ {
xil_printf("[-]\tDMM Measure Select: Current\r\n"); xil_printf("[-]\tDMM Measure Select: Current\r\n");
} }
xil_printf("[-]\tRLoad Select: #%d\r\n",u_rLoad); if (u_rLoad == 0)
{
xil_printf("[-]\tRLoad Select: #0(No Load)\r\n",u_rLoad);
}
else
{
xil_printf("[-]\tRLoad Select: #%d\r\n",u_rLoad);
}
//Sanity Check Done //Sanity Check Done
//Let's format the CPLD Reg Data //Let's format the CPLD Reg Data
NewExtInst_Zynq_Net/src/lwip_server.c
+3 -3
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@@ -133,7 +133,7 @@ err_t recv_callback(void *arg, struct tcp_pcb *tpcb,
{ {
switch (Recv_Data[14]) //By Judging Equipment to decide cal type switch (Recv_Data[14]) //By Judging Equipment to decide cal type
{ {
case 0x01: //DC Cal case 0x00: //DC Cal
{ {
u8 uCMD[DC_CMD_LEN] = {0}; u8 uCMD[DC_CMD_LEN] = {0};
@@ -166,7 +166,7 @@ err_t recv_callback(void *arg, struct tcp_pcb *tpcb,
break; break;
} }
case 0x02: //Freq Cal case 0x01: //Freq Cal
{ {
u8 uCMD[Freq_CMD_LEN] = {Recv_Data[8],Recv_Data[9],Recv_Data[10],Recv_Data[11],Recv_Data[12],Recv_Data[13],Recv_Data[14]}; u8 uCMD[Freq_CMD_LEN] = {Recv_Data[8],Recv_Data[9],Recv_Data[10],Recv_Data[11],Recv_Data[12],Recv_Data[13],Recv_Data[14]};
sw_config(uCMD); sw_config(uCMD);
@@ -191,4 +191,4 @@ err_t recv_callback(void *arg, struct tcp_pcb *tpcb,
return ERR_OK; return ERR_OK;
} }